MC68HC705C9ACFN Freescale Semiconductor, MC68HC705C9ACFN Datasheet - Page 69

• Manufacturer Part Number: MC68HC705C9ACFN
• Description: IC MCU 2.1MHZ 16K OTP 44-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACFN

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

FE — Receiver Framing Error Flag
9.13.5 Baud Rate Register
The baud rate register (BAUD), shown in
transmitter.
SCP1 — SCP0–SCI Prescaler Select Bits
SCR2 — SCR0–SCI Baud Rate Select Bits
Freescale Semiconductor
This clearable, read-only flag is set when there is a logic 0 where a stop bit should be in the character
shifted into the receive shift register. If the received word causes both a framing error and an overrun
error, the OR flag is set and the FE flag is not set. Clear the FE bit by reading the SCSR and then
reading the SCDR.
These read/write bits control prescaling of the baud rate generator clock, as shown in
clears both SCP1 and SCP0.
These read/write bits select the SCI baud rate, as shown in
SCR2–SCR0 bits.
1 = Framing error
0 = No framing error
$000D
Reset:
Read:
Write:
Bit 7
—
Table 9-1. Baud Rate Generator Clock Prescaling
SCR[2:0]
SCP[1:0]
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
000
001
010
011
100
101
110
111
00
01
10
11
= Unimplemented
Figure 9-12. Baud Rate Register (BAUD)
—
6
Table 9-2. Baud Rate Selection
SCP1
Figure
5
0
U = Undetermined
9-12, selects the baud rate for both the receiver and the
Baud Rate Generator Clock
SCP0
SCI Baud Rate (Baud)
Prescaled Clock ÷ 128
4
0
Prescaled Clock ÷ 16
Prescaled Clock ÷ 32
Prescaled Clock ÷ 64
Prescaled Clock ÷ 1
Prescaled Clock ÷ 2
Prescaled Clock ÷ 4
Prescaled Clock ÷ 8
Internal Clock ÷ 13
Internal Clock ÷ 1
Internal Clock ÷ 3
Internal Clock ÷ 4
—
3
Table
SCR2
U
9-2. Resets have no effect on the
2
SCR1
U
1
SCR0
Bit 0
Table
U
SCI I/O Registers
9-1. Reset
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