MC68HC705J1ACDW Freescale Semiconductor, MC68HC705J1ACDW Datasheet - Page 55
MC68HC705J1ACDW
Manufacturer Part Number
MC68HC705J1ACDW
Description
IC MCU 4MHZ 1.2K OTP 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet
1.MCHRC705J1ACDWE.pdf
(162 pages)
Specifications of MC68HC705J1ACDW
Core Processor
HC05
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
14
Program Memory Size
1.2KB (1.2K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Available stocks
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Price
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MC68HC705J1ACDW
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Company:
Part Number:
MC68HC705J1ACDW
Manufacturer:
MOTOROLA/摩托罗拉
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102
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INTERSIL
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3.6.2 Instruction Types
3.6.2.1 Register/Memory Instructions
MC68HC705J1A — Rev. 4.0
The MCU instructions fall into these five categories:
These instructions operate on CPU registers and memory locations.
Most of them use two operands. One operand is in either the
accumulator or the index register. The CPU finds the other operand in
memory.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Register/memory instructions
Read-modify-write instructions
Jump/branch instructions
Bit manipulation instructions
Control instructions
Add memory byte and carry bit to accumulator
Add memory byte to accumulator
AND memory byte with accumulator
Bit test accumulator
Compare accumulator
Compare index register with memory byte
EXCLUSIVE OR accumulator with memory byte
Load accumulator with memory byte
Load index register with memory byte
Multiply
OR accumulator with memory byte
Subtract memory byte and carry bit from accumulator
Store accumulator in memory
Store index register in memory
Subtract memory byte from accumulator
Central Processor Unit (CPU)
Go to: www.freescale.com
Table 3-1. Register/Memory Instructions
Instruction
Central Processor Unit (CPU)
Mnemonic
CMP
EOR
ORA
ADC
ADD
AND
CPX
MUL
SBC
SUB
LDA
LDX
STX
STA
BIT
Technical Data
Instruction Set
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