MC68HC705J1ACDW Freescale Semiconductor, MC68HC705J1ACDW Datasheet - Page 82

• Manufacturer Part Number: MC68HC705J1ACDW
• Description: IC MCU 4MHZ 1.2K OTP 20-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705J1ACDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 14
• Program Memory Size: 1.2KB (1.2K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Low-Power Modes
5.4.2 CPU
5.4.3 COP Watchdog
Technical Data
NOTE:
NOTE:
The STOP instruction:
The WAIT instruction:
The STOP instruction:
To prevent the STOP instruction from disabling the COP watchdog,
program the stop-to-wait conversion bit (SWAIT) in the mask option
register to logic 1.
Immediately after exiting stop mode by external interrupt, service the
COP to ensure a full COP timeout period.
•
•
After exiting stop mode, the CPU clock begins running after the
oscillator stabilization delay.
After exit from stop mode by external interrupt, the I bit remains clear.
After exit from stop mode by reset, the I bit is set.
•
•
After exit from wait mode by interrupt, the I bit remains clear.
After exit from wait mode by reset, the I bit is set.
•
•
After exit from stop mode by external interrupt, the COP watchdog
counter immediately begins counting from $0000 and continues
counting throughout the oscillator stabilization delay.
Freescale Semiconductor, Inc.
For More Information On This Product,
Clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts
Disables the CPU clock
Clears the interrupt mask (I bit) in the condition code register,
enabling interrupts
Disables the CPU clock
Clears the COP watchdog counter
Disables the COP watchdog clock
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Low-Power Modes
MC68HC705J1A — Rev. 4.0