MC68HC705KJ1CDW Freescale Semiconductor, MC68HC705KJ1CDW Datasheet - Page 19

• Manufacturer Part Number: MC68HC705KJ1CDW
• Description: IC MCU 4MHZ 1.2K OTP 16-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705KJ1CDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 10
• Program Memory Size: 1.2KB (1.2K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

1.4.2.4 External Clock
An external clock from another CMOS-compatible device can be connected to the OSC1 input, with the
OSC2 input not connected, as shown in
the crystal/ceramic resonator or the RC oscillator is enabled.
1.4.3 RESET
Applying a logic 0 to the RESET pin forces the MCU to a known startup state. An internal reset also pulls
the RESET pin low. An internal resistor to V
RESET and V
RESET pin contains an internal Schmitt trigger to improve its noise immunity as an input. Refer to
Chapter 8 Resets and Interrupts
1.4.4 IRQ/V
The external interrupt/programming voltage pin (IRQ/V
of the CPU. Additionally, it is used to program the user EPROM and mask option register. (See
Chapter 2 Memory
The LEVEL bit in the mask option register provides negative edge-sensitive triggering or both negative
edge-sensitive and low level-sensitive triggering for the interrupt function.
If level-sensitive triggering is selected, the IRQ/V
operation. If the IRQ/V
The IRQ/V
voltage on this pin should not exceed V
EPROM.
1.4.5 PA0–PA7
These eight input/output (I/O) lines comprise port A, a general-purpose bidirectional I/O port. (See
Chapter 5 External Interrupt Module (IRQ)
1.4.6 PB2 and PB3
These two I/O lines comprise port B, a general-purpose bidirectional I/O port.
Freescale Semiconductor
PP
PP
pin contains an internal Schmitt trigger as part of its input to improve noise immunity. The
DD
The mask option register can enable the PA0–PA3 pins to function as
external interrupt pins.
pins discharges any RESET pin voltage when power is removed from the MCU. The
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
and
PP
Chapter 5 External Interrupt Module
pin is not used, it must be tied to the V
Figure 1-8. External Clock Connections
for more information.
DD
Figure
CMOS CLOCK
EXTERNAL
except when the pin is being used for programming the
for information on PA0–PA3 external interrupts.)
DD
pulls the RESET pin high. A steering diode between the
1-8. This configuration is possible regardless of whether
PP
NOTE
MCU
input requires an external resistor to V
PP
) drives the asynchronous IRQ interrupt function
(IRQ).)
DD
supply.
DD
for wired-OR
Pin Functions
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