MC68HC705KJ1CDW Freescale Semiconductor, MC68HC705KJ1CDW Datasheet - Page 58

• Manufacturer Part Number: MC68HC705KJ1CDW
• Description: IC MCU 4MHZ 1.2K OTP 16-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705KJ1CDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 10
• Program Memory Size: 1.2KB (1.2K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Low-Power Modes
6.3 Effects of Stop and Wait Modes
The STOP and WAIT instructions have the following effects on MCU modules.
6.3.1 Clock Generation
Effects of STOP and WAIT on clock generation are discussed here.
6.3.1.1 STOP
The STOP instruction disables the internal oscillator, stopping the CPU clock and all peripheral clocks.
After exiting stop mode, the CPU clock and all enabled peripheral clocks begin running after the oscillator
stabilization delay.
6.3.1.2 WAIT
The WAIT instruction disables the CPU clock.
After exiting wait mode, the CPU clock and all enabled peripheral clocks immediately begin running.
6.3.2 CPU
Effects of STOP and WAIT on the CPU are discussed here.
6.3.2.1 STOP
The STOP instruction:
After exiting stop mode, the CPU clock begins running after the oscillator stabilization delay.
After exit from stop mode by external interrupt, the I bit remains clear.
After exit from stop mode by reset, the I bit is set.
6.3.2.2 WAIT
The WAIT instruction:
After exit from wait mode by interrupt, the I bit remains clear.
After exit from wait mode by reset, the I bit is set.
6.3.3 COP Watchdog
Effects of STOP and WAIT on the COP watchdog are discussed here.
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Clears the interrupt mask (I bit) in the condition code register, enabling external interrupts
Disables the CPU clock
Clears the interrupt mask (I bit) in the condition code register, enabling interrupts
Disables the CPU clock
The oscillator stabilization delay holds the MCU in reset for the first 4064
internal clock cycles.
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
NOTE
Freescale Semiconductor