MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 135

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
MC68HC05B6
Rev. 4.1
(1) All I
(2) Typical values are at mid point of voltage range and at 25°C only.
(3) RUN and WAIT I
(V
Output voltage
Output high voltage (I
Output high voltage (I
Output low voltage (I
Output low voltage (I
Input high voltage
Input low voltage
Supply current
High-Z leakage current
Input current (0 to 70)
Input current (– 40 to 125)
Capacitance
SCLK
DD
transient switching currents inherent in CMOS designs (see Section 2).
from rail; no DC loads; maximum load on outputs 50pF (20pF on OSC2).
STOP /WAIT I
OSC1 = V
WAIT I
I
I
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2
TDO, SCLK, PLMA, PLMB
TDO, SCLK, PLMA, PLMB
RESET
PA0–7, PB0–7, PC0–7, PD0–7, OSC1,
PA0–7, PB0–7, PC0–7, PD0–7, OSC1, IRQ
RESET, TCAP1, TCAP2, RDI
RUN (SM = 0) (See
RUN (SM = 1) (See
WAIT (SM = 0) (See
WAIT (SM = 1) (See
STOP
PA0–7, PB0–7, PC0–7, TDO, RESET, SCLK
IRQ, OSC1, TCAP1, TCAP2, RDI,
PD0/AN0-PD7/AN7 (channel not selected)
IRQ, OSC1, TCAP1, TCAP2, RDI,
Ports (as input or output), RESET, TDO,
IRQ, TCAP1, TCAP2, OSC1, RDI
PD0/AN0–PD7/AN7 (A/D off)
PD0/AN0–PD7/AN7 (A/D on)
LOAD
LOAD
IRQ, RESET, TCAP1, TCAP2, RDI
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2,
= 3.3Vdc ± 10%, V
DD
– 40 to 85 (extended)
– 40 to 105 (extended)
– 40 to 125 (automotive)
DD
measurements taken with suitable decoupling capacitors across the power supply to suppress the
= – 10 µA
= +10 µA
0 to 70 (standard)
DD
is affected linearly by the OSC2 capacitance.
(3)
Table 11-3 DC electrical characteristics for 3.3V operation
.
Characteristic
DD
DD
: all ports configured as inputs; V
LOAD
LOAD
LOAD
LOAD
: measured using an external square-wave clock source (f
Figure
Figure
SS
Figure
Figure
= 0.4mA)
= 0.4mA)
= 0.2mA)
= 0.4mA)
= 0Vdc, T
(1)
11-1)
11-2)
ELECTRICAL SPECIFICATIONS
11-3)
11-4)
A
= T
L
to T
,
H
)
IL
Symbol
C
= 0.2 V and V
V
V
V
V
V
V
C
C
C
V
I
V
I
I
DD
I
OUT
OH
OL
OH
OH
OL
OL
IL
IN
IN
IH
IN
IN
IN
IL
V
V
V
0.7V
DD
DD
DD
Min
V
IH
SS
– 0.1
– 0.3
– 0.3
= V
DD
DD
– 0.2 V: STOP I
V
V
DD
DD
Typ
OSC
±0.2
±0.2
±0.2
0.15
0.1
0.2
1.2
0.2
0.4
12
22
1
– 0.1
– 0.1
(2)
= 2.0MHz); all inputs 0.2 V
0.2V
Max
V
DD
0.1
0.3
0.6
1.5
0.5
10
10
40
40
±1
±1
±1
±5
12
DD
3
1
8
DD
measured with
Unit
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
pF
pF
pF
pF
V
V
V
V
V
Freescale
11-5
11

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