MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 170

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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14
PBPD – Port B pull-down resistors
PCPD — Port C pull-down resistors
The combination of bit 0 and bit 1 allows the option of pull-down resistors on 0, 8 or 16 inputs. This
feature is not available on the MC68HC05B6.
C.5
The 432 bytes of self-check firmware on the MC68HC05B6 are replaced with 496 bytes of
bootstrap firmware. The bootstrap firmware located from $0200 to $02FF and $1F00 to $1FEF
can be used to program the EPROM, to check if the EPROM is erased and to load and execute
data in RAM.
When the MC68HC705B5 is placed in the bootstrap mode, the bootstrap reset vector is fetched
and the bootstrap firmware starts to execute.
each level of bootstrap mode on the rising edge of RESET. The hold time on the IRQ and TCAP1
pins after the external RESET pin is brought high is two clock cycles.
Freescale
C-8
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
x = Don’t care
V
+ 9 Volts
+ 9 Volts
+ 9 Volts
+ 9 Volts
IRQ pin
SS
to V
Bootstrap mode
DD
TCAP1 pin
V
SS
The watchdog will be active during WAIT mode.
The watchdog system will be disabled during WAIT mode.
Pull-down resistors are connected to all 8 pins of port B; the
pull-down, R
No pull-down resistors are connected.
Pull-down resistors are connected to all 8 pins of port C; the
pull-down, R
No pull-down resistors are connected.
V
V
V
V
to V
DD
DD
DD
DD
DD
Table C-2 Mode of operation selection
PD2
0
x
x
x
x
PD
PD
, is active only while the pin is an input.
, is active only while the pin is an input.
PD3
1
0
1
0
x
MC68HC705B5
PD4
x
0
0
1
1
Table C-2
Single chip
Erased EPROM verification
EPROM parallel bootstrap load
EPROM (RAM) serial bootstrap load and execute
RAM parallel bootstrap load and execute
shows the conditions required to enter
Mode
MC68HC05B6
Rev. 4.1

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