MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 64
Manufacturer Part Number
IC MCU 2.1MHZ 15K OTP 52-PLCC
Specifications of MC68HC705B16CFN
Number Of I /o
Program Memory Size
15KB (15K x 8)
Program Memory Type
256 x 8
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
The timer status register ($13) is a read only register and contains the status bits corresponding
to the four timer interrupt conditions – ICF1,OCF1, TOF, ICF2 and OCF2.
Accessing the timer status register satisfies the first condition required to clear the status bits. The
remaining step is to access the register corresponding to the status bit.
ICF1 — Input capture flag 1
This bit is set when the selected polarity of edge is detected by the input capture edge detector 1
at TCAP1; an input capture interrupt will be generated, if ICIE is set. ICF1 is cleared by reading
the TSR and then the input capture low register 1 ($15).
OCF1 — Output compare flag 1
This bit is set when the output compare 1 register contents match those of the free-running
counter; an output compare interrupt will be generated if OCIE is set. OCF1 is cleared by reading
the TSR and then reading or writing the output compare 1 low register ($17).
TOF — Timer overflow status flag
This bit is set when the free-running counter overflows from $FFFF to $0000; a timer overflow interrupt
will occur if TOIE is set. TOF is cleared by reading the TSR and the counter low register ($19).
When using the timer overflow function and reading the free-running counter at random times to
measure an elapsed time, a problem may occur whereby the timer overflow flag is unintentionally
Reading the alternate counter register instead of the counter register will avoid this potential
Timer status (TSR)
0 (clear) –
0 (clear) –
0 (clear) –
1 The timer status register is read or written when TOF is set, and
1) The LSB of the free-running counter is read, but not for the purpose of
servicing the flag.
Timer status register (TSR)
A valid input capture has occurred.
No input capture has occurred.
A valid output compare has occurred.
No output compare has occurred.
Timer overflow has occurred.
No timer overflow has occurred.