MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 98

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MC68HC705B16CFN

Manufacturer Part Number
MC68HC705B16CFN
Description
IC MCU 2.1MHZ 15K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705B16CFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
15KB (15K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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7
The SM bit is cleared by external or power-on reset. The SM bit is automatically cleared when
entering STOP mode.
Note:
7.2
The slow/fast mode of the PLM D/A converters is selected by bits 1, 2, and 3 of the miscellaneous
register at address $000C (SFA bit for PLMA and SFB bit for PLMB). The slow/fast mode has no
effect on the D/A converters’ 8-bit resolution (see
7.3
On entering STOP mode, the PLM outputs remain at their particular level. When STOP mode is
exited by an interrupt, the PLM systems resume regular operation. If STOP mode is exited by
power-on or external reset the registers values are forced to $00.
7.4
The PLM system is not affected by WAIT mode and continues normal operation.
Freescale
7-4
f
OSC
The bits that are shown shaded in the above representation are explained individually
in the relevant sections of this manual. The complete register plus an explanation of
each bit can be found in
PLM clock selection
PLM during STOP mode
PLM during WAIT mode
÷32
÷2
SM bit = 0
SM bit = 1
PULSE LENGTH D/A CONVERTERS
Figure 7-3 PLM clock selection
Section 3.8
frequency (f
Bus
OP
Figure
)
÷4
7-3).
Timer
clock
x4096
x256
SF bit = 1
SF bit = 0
MC68HC05B6
Rev. 4.1
clock
PLM

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