MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 185

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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9.6 Glossary of Terms
MMC2107 – Rev. 2.0
MOTOROLA
Array block – CMFR array subdivision is a 16-Kbyte contiguous block
of information. Each array block can be erased independently.
BIU – Bus interface unit that controls access and operation of the CMFR
CMFR – CDR MoneT FLASH ARray
Erase interlock write – A write to any CMFR array address after
initializing the erase sequence
Erase margin read – Special off-page read of the CMFR array in which
the CMFR hardware adjusts the reference of the sense amplifier to
check for correct erase operation. All CMFR off-page reads between the
erase interlock write and clearing the SES bit are erase margin reads.
Initialize program/erase sequence – The write to the high-voltage
control register that changes the SES bit from a 0 to a 1
MoneT – The Motorola one-transistor bitcell
Off-page read – Array read operation that requires two clocks and
updates a page buffer
On-page read – Array read operation that accesses information in one
of the read page buffers and requires one clock.
Overprogrammed – By exceeding the specified programming time
and/or voltage, a CMFR bit can be overprogrammed. This causes
erased bits in the same column in the same array block to read as
programmed.
Programming write – A write to a CMFR array address to transfer
information into a program page buffer. The CMFR accepts
programming writes after initializing the program sequence until the EHV
bit is changed from a 0 to a 1.
Program margin read – Special off-page read of the CMFR array in
which the CMFR hardware adjusts the reference of the sense amplifier
to check for correct program operation. All CMFR array off-page reads
between the first programming write and clearing the SES bit are
program margin reads.
Freescale Semiconductor, Inc.
For More Information On This Product,
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
Non-Volatile Memory FLASH (CMFR)
Glossary of Terms
Technical Data
185

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