MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 191

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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MMC2107 – Rev. 2.0
MOTOROLA
RSVD24 — Reserved
SUPV[7:0] — Supervisor Space Field
DATA[7:0] — Data Space Field
Writing to this read/write bit updates the value but has no effect on
functionality.
The read-always SUPV[7:0] field controls supervisor/unrestricted
address space assignment of array blocks. The field is writable when
the LOCKCTL bit is clear.
Array blocks that correspond to 1s in SUPV[7:0] are selected for data
address space.
Each array block can be mapped into supervisor or unrestricted
address space. When an array block is mapped into supervisor
address space (SUPV[M] = 1) only supervisor accesses are allowed.
A user access to a location in supervisor address space causes a
data error exception. When an array block is mapped into unrestricted
address space (SUPV[M] = 0) both supervisor and user accesses are
allowed.
The default reset state of SUPV[7:0] bits are supervisor address
space (SUPV[M] = 1).
The read-always DATA[7:0] field controls data/program address
space assignment of array blocks. When LOCKCTL = 1, the
DATA[7:0] field is write-protected, and writing to it has no effect.
Array blocks that correspond to 1s in DATA[7:0] are selected for data
address space.
Each array block can be mapped into data address space or both data
and program address space. When an array block is mapped into
data address space (DATA[M] = 1) only data accesses are allowed.
A program access to a location in data address space causes a data
error exception. When an array block is mapped into both data and
program address space (DATA[M] = 0) both data and program
accesses are allowed.
The default reset state of DATA[7:0] bits are data and program
address space (DATA[M] = 0).
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Array block in supervisor address space
0 = Array block in unrestricted address space
1 = Array block in data address space
0 = Array block is both data and program address space
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
Non-Volatile Memory FLASH (CMFR)
Registers and Memory Map
Technical Data
191

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