MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 219
MMC2107CFCPV33
Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet
1.MMC2107CFCAF33.pdf
(618 pages)
Specifications of MMC2107CFCPV33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
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9.8.5.3 Erasing Shadow Information Words
9.8.6 Erase Pulse Amplitude and Width Modulation
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
NOTE:
The shadow information words are erased with either array block 0
depending upon the array configuration. To verify that the shadow
information words are erased with block 0, erase margin reads should
be performed with the SIE bit set in CMFRMCR while the shadow
information is read. For the erase operation to be completed, block 0
must also be fully verified.
Setting SIE = 1 disables normal array access and should be cleared
after verifying the shadow information.
Refer to
of the FLASH.
The values of PAWS[2:0] and NVR should be updated on the
appropriate pulse to change the erase voltage.
GDB = 0 for all erase operations.
Margin reads are required after the first –9-V pulse.
Voltage Step
Freescale Semiconductor, Inc.
For More Information On This Product,
–2 V
–3 V
–4 V
–5 V
–6 V
–7 V
–8 V
–9 V
Non-Volatile Memory FLASH (CMFR)
Table 9-11
Go to: www.freescale.com
Table 9-11. Required Erase Algorithm
PAWS[2:0]
1 0 0
1 0 1
1 1 0
1 1 1
1 0 0
1 0 1
1 1 0
1 1 1
for the required erase algorithm to insure reliability
NVR
1
1
1
1
0
0
0
0
Pulse Width
100 ms
100 ms
100 ms
100 ms
100 ms
100 ms
100 ms
100 ms
Non-Volatile Memory FLASH (CMFR)
Functional Description
Number of Pulses
Technical Data
20
1
1
1
1
1
1
1
219
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