MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 222

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Clock Module
10.2 Introduction
10.3 Features
Technical Data
222
10.8.3
10.8.3.1
10.8.3.2
10.8.4
10.8.4.1
10.8.4.2
10.8.5
10.8.6
10.8.6.1
10.8.6.2
10.8.6.3
10.8.6.4
10.9
10.10 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
The clock module contains:
To improve noise immunity, the PLL and OSC have their own power
supply pins, V
normal internal supply pins, V
Features of the clock module include:
Freescale Semiconductor, Inc.
For More Information On This Product,
Crystal oscillator (OSC)
Phase-locked loop (PLL)
Reduced frequency divider (RFD)
Status and control registers
Control logic
2- to 10-MHz reference crystal
Support for low-power modes
Separate clock out signal
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
PLL Lock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Loss of Clock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
Clock Operation During Reset . . . . . . . . . . . . . . . . . . . . . . 243
PLL Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
PLL Loss of Lock Conditions . . . . . . . . . . . . . . . . . . . . . 238
PLL Loss of Lock Reset . . . . . . . . . . . . . . . . . . . . . . . . . 238
Alternate Clock Selection . . . . . . . . . . . . . . . . . . . . . . . . 239
Loss-of-Clock Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . .242
Phase and Frequency Detector (PFD). . . . . . . . . . . . . .245
Charge Pump/Loop Filter . . . . . . . . . . . . . . . . . . . . . . . . 245
Voltage Control Output (VCO) . . . . . . . . . . . . . . . . . . . . 246
Multiplication Factor Divider (MFD) . . . . . . . . . . . . . . . . 246
Go to: www.freescale.com
DDSYN
Clock Module
and V
SSSYN
DD
and V
. All other circuits are powered by the
SS
.
MMC2107 – Rev. 2.0
MOTOROLA

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