MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 364

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Serial Communications Interface Modules (SCI1 and SCI2)
16.12.5.2 Fast Data Tolerance
Technical Data
364
Serial Communications Interface Modules (SCI1 and SCI2)
Figure 16-24
without causing a noise error or a framing error. The fast stop bit ends at
RT10 instead of RT16 but is still sampled at RT8, RT9, and RT10.
For 8-bit data, sampling of the stop bit takes the receiver:
With the misaligned data shown in
154 RT cycles at the point when the count of the transmitting device is:
The maximum percent difference between the receiver count and the
transmitter count for fast 8-bit data with no errors is:
For 9-bit data, sampling of the stop bit takes the receiver:
With the misaligned data shown in
170 RT cycles at the point when the count of the transmitting device is:
The maximum percent difference between the receiver count and the
transmitter count for fast 9-bit data with no errors is:
Freescale Semiconductor, Inc.
RECEIVER
RT CLOCK
For More Information On This Product,
10 bit times
9 bit times
Go to: www.freescale.com
10 bit times
11 bit times
shows how much a fast received frame can be misaligned
16 RT cycles + 10 RT cycles = 154 RT cycles.
16 RT cycles + 10 RT cycles = 170 RT cycles.
154 160
------------------------- -
170 176
------------------------- -
Figure 16-24. Fast Data
STOP
154
170
–
–
16 RT cycles = 160 RT cycles.
16 RT cycles = 176 RT cycles.
Figure
Figure
100
100
SAMPLES
DATA
=
=
16-24, the receiver counts
16-24, the receiver counts
3.90%
3.53%
IDLE OR NEXT FRAME
MMC2107 – Rev. 2.0
MOTOROLA