MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 378

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Serial Peripheral Interface Module (SPI)
17.7.2 SPI Control Register 2
Technical Data
378
C
D
A
B
1. Slave output is enabled if SPIDDR bit 0 = 1, SS = 0, and MSTR = 0 (A, C).
2. Master output is enabled if SPIDDR bit 1 = 1 and MSTR = 1 (B, D).
3. SCK output is enabled if SPIDDR bit 2 = 1 and MSTR = 1 (B, D).
4. SS output is enabled if SPIDDR bit 3 = 1, SPICR1 bit 1 (SSOE) = 1, and MSTR = 1 (B, D).
5. GP = General-purpose
Normal
Bidirectional
Pin Mode
SPC0 MSTR
0
1
Address: 0x00cb_0001
0
1
0
1
Reset:
Read: Anytime
Write: Anytime; writing to unimplemented bits has no effect
SPISDOZ — SPI Stop in Doze Bit
SPC0 — Serial Pin Control Bit 0
Read:
Table 17-4. Bidirectional Pin Configurations
Write:
The SPIDOZ bit stops the SPI clocks when the CPU is in doze mode.
Reset clears SPISDOZ.
The SPC0 bit enables the bidirectional pin configurations shown in
Table
Freescale Semiconductor, Inc.
Slave data output Slave data input
Master data input Master data output SCK output
Slave data I/O
GP I/O
For More Information On This Product,
1 = SPI inactive in doze mode
0 = SPI active in doze mode
MISO Pin
Serial Peripheral Interface Module (SPI)
Bit 7
0
0
17-4. Reset clears SPC0.
Figure 17-3. SPI Control Register 2 (SPICR2)
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= Writes have no effect and the access terminates without a transfer error exception.
(1)
6
0
0
GP
Master data I/O
(5)
MOSI Pin
I/O
5
0
0
(2)
4
0
0
SCK input
SCK input
SCK output
SCK Pin
3
0
0
(3)
Slave-select input
MODF input (DDRSP3 = 0)
or GP output (DDRSP3 = 1)
Slave-select input
MODF input (DDRSP3 = 0)
or GP output (DDRSP3 = 1)
2
0
1
MMC2107 – Rev. 2.0
SS Pin
SPISDOZ
1
0
MOTOROLA
(4)
SPC0
Bit 0
0