MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 393

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

17.8.4 SPI Baud Rate Generation
17.8.5 Slave-Select Output
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
the slave SPI clock frequency, there are two SPI clocks between the fall
of SS and the SCK edge.
As long as another late SPIDR write does not occur, the following bytes
to and from the slave are correctly transmitted.
The baud rate generator divides the SPI clock to produce the SPI baud
clock. The SPPR[6:4] and SPR[2:0] bits in SPIBR select the SPI clock
divisor:
where:
The baud rate generator is active only when the SPI is in master mode
and transmitting. Otherwise, the divider is inactive to reduce I
The slave-select output feature automatically drives the SS pin low
during transmission to select external devices and drives it high during
idle to deselect external devices. When SS output is selected, the SS
output pin is connected to the SS input pin of the external device.
In master mode only, setting the SSOE bit in SPICR1 and the DDRSP[3]
bit in SPIDDR configures the SS pin as a slave-select output.
Setting the SSOE bit disables the mode fault feature.
Be careful when using the slave-select output feature in a multimaster
system. The mode fault feature is not available for detecting system
errors between masters.
Freescale Semiconductor, Inc.
SPPR = the value written to bits SPPR[6:4]
SPR = the value written to bits SPR[2:0]
For More Information On This Product,
Serial Peripheral Interface Module (SPI)
Go to: www.freescale.com
SPI clock divisor = (SPPR + 1)
Serial Peripheral Interface Module (SPI)
2(SPR+1)
Functional Description
Technical Data
DD
current.
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