MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 395

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

17.8.7 Error Conditions
17.8.7.1 Write Collision Error
17.8.7.2 Mode Fault Error
MMC2107 – Rev. 2.0
MOTOROLA
The SPI has two error conditions:
The WCOL flag in SPISR indicates that a serial transfer was in progress
when the MCU tried to write new data to SPIDR. Valid write times are
listed below (see
and t
A write during any other time causes a WCOL error. The write is disabled
to avoid writing over the data being transmitted. WCOL does not
generate an interrupt request because the WCOL flag can be read upon
completion of the transmission that was in progress at the time of the
error.
If the SS input of a master SPI goes low, it indicates a system error in
which more than one master may be trying to drive the MOSI and SCK
lines simultaneously. This condition is not permitted in normal operation;
it sets the MODF flag in SPISR. If the SPIE bit in SPICR1 is also set,
MODF generates an interrupt request.
Configuring the SS pin as a general-purpose output or a slave-select
output disables the mode fault function.
A mode fault clears the SPE and MSTR bits and the DDRSP bits of the
SCK, MISO, and MOSI (or MOMI) pins. This forces those pins to be
high-impedance inputs to avoid any conflict with another output driver.
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Freescale Semiconductor, Inc.
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I
):
Write collision error
Mode fault error
In master mode, a valid write is within t
In slave phase 0, a valid write within t
In slave phase 1, a valid write is within t
edge and before SS goes low), excluding the first two SPI clocks
after the last SCK edge (the beginning of t
Serial Peripheral Interface Module (SPI)
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Figure 17-11
and
Figure 17-12
Serial Peripheral Interface Module (SPI)
I
(when SS is high).
I
T
(when SS is high).
or t
T
for definitions of t
is an illegal write).
I
(after the last SCK
Functional Description
Technical Data
T
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