MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 409

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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18.6.5 Multiplexed Analog Input Pins
18.6.6 Voltage Reference Pins
18.6.7 Dedicated Analog Supply Pins
18.7 Memory Map
MMC2107 – Rev. 2.0
MOTOROLA
In the external multiplexed mode, four of the port QB pins are redefined
to each represent four input channels. See
V
voltages. Separating the reference inputs from the power supply pins
allows for additional external filtering, which increases reference voltage
precision and stability, and subsequently contributes to a higher degree
of conversion accuracy.
V
QADC module. Dedicated power is required to isolate the sensitive
analog circuitry from the normal levels of noise present on the digital
power supply.
The QADC occupies 1 Kbyte, or 512 16-bit entries, of address space.
Ten 16-bit registers are control, port, and status registers, 64 16-bit
entries are the CCW table, and 64 16-bit entries are the result table
which occupies 192 16-bit address locations because the result data is
readable in three data alignment formats.
memory map.
RH
DDA
Freescale Semiconductor, Inc.
and V
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
and V
Analog Input
Multiplexed
RL
Table 18-1. Multiplexed Analog Input Channels
SSA
Go to: www.freescale.com
ANw
are the dedicated input pins for the high and low reference
ANx
ANy
ANz
pins supply power to the analog subsystems of the
Even numbered channels from 0 to 6
Odd numbered channels from 1 to 7
Even channels from 16 to 22
Odd channels from 17 to 23
Queued Analog-to-Digital Converter (QADC)
Channels
Table 18-2
Table
18-1.
is the QADC
Technical Data
Memory Map
409

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