MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 425

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

MMC2107 – Rev. 2.0
MOTOROLA
RESUME — Queue 2 Resume Bit
BQ2[6:0] — Beginning of Queue 2 Field
RESUME selects the queue 2 resumption point after suspension due
to queue 1. If RESUME is changed during the execution of queue 2,
the change is not recognized until an end-of-queue condition is
reached or the queue operating mode of queue 2 is changed.
The primary reason for selecting re-execution of the entire queue or
subqueue is to guarantee that all samples are taken consecutively in
one scan (coherency).
When subqueues are not used, queue 2 execution restarts after
suspension with the first CCW in queue 2. When a pause has
previously occurred in queue 2 execution, queue execution restarts
after suspension with the first CCW in the current subqueue.
A subqueue is considered to be a stand-alone sequence of
conversions. Once a pause flag has been set to report subqueue
completion, that subqueue is not repeated until all CCWs in queue 2
are executed.
An example of using the RESUME bit is when the frequency of
queue 1 trigger events prohibit queue 2 completion. If the rate of
queue 1 execution is too high, it is best for queue 2 execution to
continue with the CCW that was being converted when queue 2 was
suspended. This allows queue 2 to eventually complete execution.
BQ2[6:0] indicates the CCW location where queue 2 begins. To allow
the length of queue 1 and queue 2 to vary, a programmable pointer
identifies the CCW table location where queue 2 begins. The BQ2
field also serves as an end-of-queue condition for queue 1. Setting
BQ2[6:0] beyond physical CCW table memory space allows queue 1
all 64 entries.
Software defines the beginning of queue 2 by programming the BQ2
field in QACR2. BQ2 is usually programmed before or at the same
time as the queue operating mode for queue 2 is selected. If BQ2 is
64 or greater, queue 2 has no entries, the entire CCW table is
dedicated to queue 1 and CCW63 is the end-of-queue 1. If BQ2[6:0]
is 0, the entire CCW table is dedicated to queue 2. As a special case,
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
1 = After suspension, begin execution with the aborted CCW in
0 = After suspension, begin execution with the first CCW of
queue 2.
queue 2 or the current subqueue of queue 2.
Go to: www.freescale.com
Queued Analog-to-Digital Converter (QADC)
Register Descriptions
Technical Data
425