MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 437

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

18.8.7 Conversion Command Word Table
MMC2107 – Rev. 2.0
MOTOROLA
Address: 0x00ca_0200 through 0x00ca_027e
Reset:
Reset:
Read:
Read:
Write:
Write:
CWPQ2[5:0] — Queue 2 Command Word Pointer Field
During the stop mode, the CWPQ1 is reset to 63 (0x3f), since the
control registers and the analog logic are reset. When the debug
mode is entered, the CWPQ1 is unchanged; it points to the last
executed CCW in queue 1.
CWPQ2[5:0] allows the software to know what CCW was last
completed for queue 2. This field is a software read-only field, and
write operations have no effect. CWPQ2[5:0] allows software to read
the last executed CCW in queue 2, regardless which queue is active.
The CWPQ2[5:0] field is a CCW word pointer with a valid range of 0
to 63.
In contrast to CWP, CPWQ2 is updated when the conversion result is
written. When the QADC finishes a conversion in queue 2, both the
result register is written and the CWPQ2 are updated.
During the stop mode, the CWPQ2 is reset to 63, since the control
registers and the analog logic are reset. When the debug mode is
entered, the CWP is unchanged; it points to the last executed CCW
in queue 2.
Freescale Semiconductor, Inc.
Figure 18-14. Conversion Command Word Table (CCW)
U = Unaffected
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Bit 15
Bit 7
IST1
U
0
0
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= Writes have no effect and the access terminates without a transfer error exception.
IST0
14
U
0
0
6
CHAN5
13
U
0
0
5
CHAN4
12
U
0
0
4
Queued Analog-to-Digital Converter (QADC)
CHAN3
11
U
0
0
3
CHAN2
10
U
0
0
2
Register Descriptions
CHAN1
P
U
U
9
1
Technical Data
CHAN0
Bit 8
BYP
Bit 0
U
U
437