MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 522

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chip Select Module
20.3 Features
Technical Data
522
Features of the chip select module include:
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Freescale Semiconductor, Inc.
For More Information On This Product,
Reduced system complexity — No external glue logic required for
typical systems if chip selects are used.
Four programmable asynchronous active-low chip selects
(CS[3:0]) — Chip selects can be independently programmed with
various features.
Control for external boot device — CS0 can be enabled at reset to
select an external boot device.
Fixed base addresses with 8-Mbyte block sizes
Support for emulating internal memory space — When the EMINT
bit is set in the chip configuration register (CCR), CS1 matches
only addresses in the internal memory space.
Support for 16-bit and 32-bit external devices — The external port
size can be programmed to be 16 or 32 bits.
Programmable write protection — Each chip select address range
can be designated for read access only.
Programmable access protection — Each chip select address
range can be designated for supervisor access only.
Write-enable selection — The enable byte pins (EB[3:0]) can be
configured as byte enables (assert on both external read and write
accesses) or write enables (only assert on external write
accesses).
Bus cycle termination — This option allows the chip select logic to
terminate the bus cycle.
Programmable wait states — To interface with various devices, up
to seven wait states can be programmed before the access is
terminated.
Programmable extra wait state for write accesses — One wait
state can be added to write accesses to allow writing to memories
that require additional data setup time.
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Chip Select Module
MMC2107 – Rev. 2.0
MOTOROLA