MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 542

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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JTAG Test Access Port and OnCE
21.5.2 IDCODE Instruction
Technical Data
542
The IDCODE instruction selects the 32-bit IDCODE register for
connection as a shift path between the TDI pin and the TDO pin. This
instruction allows interrogation of the MMC2107 to determine its version
number and other part identification data. The IDCODE register has
been implemented in accordance with the IEEE 1149.1 standard so that
the least significant bit of the shift register stage is set to logic 1 on the
rising edge of TCLK following entry into the capture-DR state. Therefore,
the first bit to be shifted out after selecting the IDCODE register is always
EXTEST
IDCODE
SAMPLE/PRELOAD
ENABLE_MCU_ONCE
HIGHZ
CLAMP
BYPASS
Reserved
Reserved
Reserved
1. To exit this instruction, the TRST pin must be asserted or power-on reset.
2. Motorola reserves the right to change the decoding of the unused opcodes in the future.
Freescale Semiconductor, Inc.
For More Information On This Product,
Instruction
JTAG Test Access Port and OnCE
Go to: www.freescale.com
Table 21-1. JTAG Instructions
0111–1000
1101–1110
1010–1011
IR3–IR0
0000
0001
0010
0011
1001
1100
1111
0100
0110
0101
Selects the boundary scan register while
Selects IDCODE register for shift
Selects the boundary scan register for
Instruction to enable the M•CORE TAP
Selects the bypass register while
Selects bypass while applying fixed values to
Selects the bypass register for data
Instruction for chip manufacturing purposes
Instruction for chip manufacturing purposes
Decoded to select bypass register
applying fixed values to output pins and
asserting functional reset
shifting, sampling, and preloading without
disturbing functional operation
controller
three-stating all output pins and asserting
functional reset
output pins and asserting functional reset
operations
only
only
(1)
Instruction Summary
MMC2107 – Rev. 2.0
MOTOROLA
(2)

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