MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 180

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.2 SRAM Array Address Mapping
6.3 SRAM Array Address Space Type
6.4 Normal Access
6.5 Standby and Low-Power Stop Operation
6-2
Base address registers RAMBAH and RAMBAL are used to specify the SRAM array
base address in the memory map. RAMBAH and RAMBAL can only be written while
the SRAM is in low-power stop mode (RAMMCR STOP = 1) and the base address lock
(RAMMCR RLCK = 0) is disabled. RLCK can be written once only to a value of one;
subsequent writes are ignored. This prevents accidental remapping of the array.
The RASP[1:0] in RAMMCR determine the SRAM array address space type. The
SRAM module can respond to both program and data space accesses or to program
space accesses only. Because the CPU16 operates in supervisor mode only, RASP1
has no effect.
Refer to
types and program/data space access. Refer to
formation on addressing modes.
The array can be accessed by byte, word, or long word. A byte or aligned word access
takes one bus cycle or two system clocks. A long word or misaligned word access re-
quires two bus cycles. Refer to
access times.
Standby and low-power modes should not be confused. Standby mode maintains the
RAM array when the main MCU power supply is turned off. Low-power stop mode al-
lows the CPU16 to control MCU power consumption by disabling unused modules.
Relative voltage levels of the MCU V
is in standby mode. SRAM circuitry switches to the standby power source when V
drops below specified limits. If specified standby supply voltage levels are maintained
during the transition, there is no loss of memory when switching occurs. The RAM ar-
ray cannot be accessed while the SRAM module is powered from V
operation is not desired, connect the V
5.5.1.7 Function Codes
In the CPU16, ADDR[23:20] follow the logic state of ADDR19. The
SRAM array must not be mapped to addresses $080000–$7FFFFF,
which are inaccessible to the CPU16. If mapped to these addresses,
the array remains inaccessible until a reset occurs, or it is remapped
outside of this range.
Table 6-2
Table 6-2 SRAM Array Address Space Type
Freescale Semiconductor, Inc.
RASP[1:0]
For More Information On This Product,
shows RASP[1:0] encodings.
X0
X1
STANDBY RAM MODULE
Go to: www.freescale.com
5.6 Bus Operation
for more information concerning address space
DD
Program and data accesses
STBY
and V
Program access only
NOTE
pin to V
STBY
Space
4.6 Addressing Modes
pins determine whether the SRAM
SS
for more information concerning
.
M68HC16 Z SERIES
STBY
USER’S MANUAL
for more in-
. If standby
DD