MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 183

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

7.1 MRM Register Block
7.2 MRM Array Address Mapping
M68HC16 Z SERIES
USER’S MANUAL
The masked ROM module (MRM) is only available with the MC68HC16Z2 and the
MC68HC16Z3. The MRM consists of a fixed-location control register block and an 8-
Kbyte mask-programmed read-only memory array that can be mapped to any 8-Kbyte
boundary in the system memory map. The MRM can be programmed to insert wait
states to match slower external development memory. Access time depends upon the
number of wait states specified, but can be as fast as two clock cycles. The MRM can
be used for program accesses only, or for program and data accesses. Data can be
read in bytes, words or long words. The MRM can be configured to support system
bootstrap during reset.
There are three MRM control registers: the masked ROM module configuration regis-
ter (MRMCR), and the ROM array base address registers (ROMBAH and ROMBAL).
In addition, the MRM register block contains the signature registers (RSIGHI and
RSIGLO), and ROM bootstrap words (ROMBS[0:3]).
The module mapping bit (MM) in the SIM configuration register (SIMCR) defines the
most significant bit (ADDR23) of the IMB address for each M68HC16, M68CK16, and
M68CM16 Z-series module. Because ADDR[23:20] are driven to the same value as
ADDR19, MM must be set to one. If MM is cleared, IMB modules are inaccessible. For
more information about how the state of MM affects the system, refer to
Mapping.
The MRM control register block consists of 32 bytes, but not all locations are imple-
mented. Unimplemented register addresses are read as zeros, and writes have no ef-
fect. Refer to
register bit/field definitions.
Base address registers ROMBAH and ROMBAL are used to specify the ROM array
base address in the memory map. Although the base address loaded into ROMBAH
and ROMBAL during reset is mask-programmed as user-specified, these registers
can be written after reset to change the default array address if the base address lock
bit (LOCK in MRMCR) is not masked to a value of one.
In the CPU16, ADDR[23:20] follow the logic state of ADDR19. The
MRM array must not be mapped to addresses $7FF000–$7FFFFF,
which are inaccessible to the CPU16. If mapped to these addresses,
the array remains inaccessible until a reset occurs, or it is remapped
outside of this range.
D.4 Masked ROM Module
Freescale Semiconductor, Inc.
For More Information On This Product,
MASKED ROM MODULE
Go to: www.freescale.com
MASKED ROM MODULE
SECTION 7
NOTE
for the register block address map and
5.2.1 Module
7-1