MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 19

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Figure
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M68HC16 Z SERIES
USER’S MANUAL
SCI Receiver Block Diagram ...................................................................... 10-15
GPT Block Diagram ...................................................................................... 11-2
Prescaler Block Diagram .............................................................................. 11-9
Capture/Compare Unit Block Diagram ....................................................... 11-11
Input Capture Timing Example ................................................................... 11-13
Pulse Accumulator Block Diagram ............................................................. 11-15
PWM Block Diagram .................................................................................. 11-17
CLKOUT Output Timing Diagram .................................................................A-28
External Clock Input Timing Diagram ...........................................................A-28
ECLK Output Timing Diagram ......................................................................A-28
Read Cycle Timing Diagram ........................................................................A-29
Write Cycle Timing Diagram .........................................................................A-30
Fast Termination Read Cycle Timing Diagram ............................................A-31
Fast Termination Write Cycle Timing Diagram .............................................A-32
Bus Arbitration Timing Diagram — Active Bus Case ...................................A-33
Bus Arbitration Timing Diagram — Idle Bus Case .......................................A-34
Show Cycle Timing Diagram ........................................................................A-35
Chip-Select Timing Diagram ........................................................................A-36
Reset and Mode Select Timing Diagram ......................................................A-36
Background Debug Mode Timing Diagram (Serial Communication) ............A-39
Background Debug Mode Timing Diagram (Freeze Assertion) ....................A-39
ECLK Timing Diagram ..................................................................................A-44
QSPI Timing — Master, CPHA = 0 ..............................................................A-47
QSPI Timing — Master, CPHA = 1 ..............................................................A-47
QSPI Timing — Slave, CPHA = 0 ................................................................A-48
QSPI Timing — Slave, CPHA = 1 ................................................................A-48
SPI Timing — Master, CPHA = 0 .................................................................A-51
SPI Timing — Master, CPHA = 1 .................................................................A-51
SPI Timing — Slave, CPHA = 0 ...................................................................A-52
SPI Timing — Slave, CPHA = 1 ...................................................................A-52
Input Signal Conditioner Timing ...................................................................A-53
Pulse Accumulator — Event Counting Mode (Leading Edge) ......................A-54
Pulse Accumulator — Gated Mode (Count While Pin High) ........................A-55
Pulse Accumulator — Using TOF as Gated Mode Clock .............................A-56
PWMx (PWMx Register = 01, Fast Mode) ...................................................A-56
Output Compare (Toggle Pin State) .............................................................A-57
Input Capture (Capture on Rising Edge) ......................................................A-58
General-Purpose Input .................................................................................A-59
General-Purpose Output (Causes Input Capture) ........................................A-60
Freescale Semiconductor, Inc.
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