MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 253

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

10.4 Serial Communication Interface (SCI)
10.4.1 SCI Registers
10.4.1.1 SCI Control Registers
M68HC16 Z SERIES
USER’S MANUAL
The SCI submodule contains two independent SCI systems. Each is a full-duplex uni-
versal asynchronous receiver transmitter (UART). This SCI system is fully compatible
with SCI systems found on other Freescale devices, such as the M68HC11 and
M68HC05 families.
The SCI uses a standard non-return to zero (NRZ) transmission format. An on-chip
baud-rate generator derives standard baud-rate frequencies from the MCU oscillator.
Both the transmitter and the receiver are double buffered, so that back-to-back char-
acters can be handled easily even if the CPU is delayed in responding to the comple-
tion of an individual character. The SCI transmitter and receiver are functionally
independent but use the same data format and baud rate.
Figure 10-5
diagram of the SCI receiver.
The two independent SCI systems are called SCIA and SCIB. These SCIs are identi-
cal in register set and hardware configuration, providing an application with full flexi-
bility in using the dual SCI system. References to SCI registers in this section do not
always distinguish between the two SCI systems. A reference to SCCR1, for example,
applies to both SCCR1A (SCIA control register 1) and SCCR1B (SCIB control register
1).
The SCI programming model includes the MCCI global and pin control registers and
eight SCI registers. Each of the two SCI units contains two SCI control registers, one
status register, and one data register. Refer to
SCI Status
tions.
All registers may be read or written at any time by the CPU. Rewriting the same value
to any SCI register does not disrupt operation; however, writing a different value into
an SCI register when the SCI is running may disrupt operation. To change register val-
ues, the receiver and transmitter should be disabled with the transmitter allowed to fin-
ish first. The status flags in the SCSR may be cleared at any time.
When initializing the SCI, set the transmitter enable (TE) and receiver enable (RE) bits
in SCCR1 last. A single word write to SCCR1 can be used to initialize the SCI and en-
able the transmitter and receiver.
SCCR0 contains the baud rate selection field. The baud rate must be set before the
SCI is enabled. The CPU16 can read and write this register at any time.
Register, and
shows a block diagram of the SCI transmitter.
MULTICHANNEL COMMUNICATION INTERFACE
Freescale Semiconductor, Inc.
For More Information On This Product,
D.7.12 SCI Data Register
Go to: www.freescale.com
D.7.9 SCI Control Register
for register bit and field defini-
Figure 10-6
shows a block
0,
D.7.11
10-13