MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 282

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

11.11.1 PWM Counter
11.11.2 PWM Function
11-18
[2:0]
PPR
000
001
010
011
100
101
110
111
The 16-bit counter in the PWM unit is similar to the timer counter in the capture/com-
pare unit. During reset, the GPT is configured to use the system clock divided by two
to drive the counter. Initialization software can reconfigure the counter to use one of
seven prescaler outputs or an external clock input from the PCLK pin.
The PWM count register (PWMCNT) can be read at any time without affecting its val-
ue. A read must be a word access to ensure coherence, but byte accesses can be
made if coherence is not needed. The counter is cleared to $0000 during reset and is
a read-only register except in freeze or test mode.
Fifteen of the sixteen counter bits are output to multiplexers A and B. The multiplexers
provide the fast and slow modes of the PWM unit. Mode for PWMA is selected by the
SFA bit in the PWM control register C (PWMC). Mode for PWMB is selected by the
SFB bit in the same register.
PWMA, PWMB, and PPR[2:0] bits in PWMC control PWM output frequency. In fast
mode, bits [7:0] of PWMCNT are used to clock the PWM logic; in slow mode, bits [14:7]
are used. The period of a PWM output in slow mode is 128 times longer than the fast
mode period.
20.97 MHz, and 25.17 MHz system clocks.
The pulse width values of the PWM outputs are determined by control registers PWMA
and PWMB. PWMA and PWMB are 8-bit registers implemented as two bytes of a 16-
bit register. PWMA and PWMB can be accessed as separate bytes or as one 16-bit
register. A value of $00 loaded into either register causes the corresponding output pin
to output a continuous logic level zero signal. A value of $80 causes the corresponding
output signal to have a 50% duty cycle, and so on, to the maximum value of $FF, which
corresponds to an output which is at logic level one for 255/256 of the cycle.
Setting the F1A (for PWMA) or F1B (for PWMB) bits in the CFORC register causes the
corresponding pin to output a continuous logic level one signal. The logic level of the
associated pin does not change until the end of the current cycle. F1A and F1B are
the lower two bits of CFORC, but can be accessed at the same word address as
PWMC.
Div 16 = 1.05 MHz Div 16 = 1.31 MHz Div 16 = 1.57 MHz
Div 128 = 131 kHz Div 128 = 164 kHz Div 128 = 197 kHz
Div 2 = 8.39 MHz
Div 4 = 4.19 MHz
Div 8 = 2.10 MHz
Div 32 = 524 kHz
Div 64 = 262 kHz
16.78 MHz
PCLK
Table 11-3
Div 2 = 10.5 MHz
Div 4 = 5.25 MHz
Div 8 = 2.62 MHz
Div 32 = 655 kHz
Div 64 = 328 kHz
Prescaler Tap
20.97 MHz
PCLK
Freescale Semiconductor, Inc.
Table 11-3 PWM Frequency Ranges
For More Information On This Product,
shows a range of PWM output frequencies using 16.78 MHz,
Div 2 = 12.6 MHz
Div 4 = 6.29 MHz
Div 8 = 3.15 MHz
Div 32 = 787 kHz
Div 64 = 393 kHz
GENERAL-PURPOSE TIMER
25.17 MHz
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PCLK
16.78 MHz 20.97 MHz 25.17 MHz
PCLK/256
4.09 kHz
32.8 kHz
16.4 kHz
8.19 kHz
2.05 kHz
1.02 kHz
512 Hz
SFA/B = 0
PCLK/256
20.5 kHz
10.2 kHz
5.15 kHz
2.56 kHz
1.28 kHz
41 kHz
641 Hz
PCLK/256
49.2 kHz
24.6 kHz
12.3 kHz
6.13 kHz
3.07 kHz
1.54 kHz
770 Hz
16.78 MHz
64.0 Hz
32.0 Hz
16.0 Hz
256 Hz
128 Hz
8.0 Hz
4.0 Hz
PCLK/
32768
M68HC16 Z SERIES
20.97 MHz
SFA/B = 1
USER’S MANUAL
80.0 Hz
40.0 Hz
20.0 Hz
10.0 Hz
320 Hz
160 Hz
5.0 Hz
PCLK/
32768
25.17 MHz
384 Hz
192 Hz
PCLK/
32768
96 Hz
48 Hz
24 Hz
12 Hz
6 Hz