MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 386

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

SYPCR — System Protection Control Register
D.2.12 System Protection Control Register
SWE — Software Watchdog Enable
SWP — Software Watchdog Prescaler
SWT[1:0] — Software Watchdog Timing
D-12
15
RESET:
This register controls system monitor functions, software watchdog clock prescaling,
and bus monitor timing. This register can be written once following power-on or reset.
Bits [15:8] are unimplemented and will always read zero.
This bit controls the value of the software watchdog prescaler.
The reset value of SWP is the complement of the state of the MODCLK pin during
reset.
This field selects the divide ratio used to establish the software watchdog time-out pe-
riod. Refer to
The following equation calculates the time-out period for a slow reference frequency,
where f
The following equation calculates the time-out period for a fast reference frequency,
where f
0 = Software watchdog is disabled.
1 = Software watchdog is enabled.
0 = Software watchdog clock is not prescaled.
1 = Software watchdog clock is prescaled by 512.
ref
ref
is equal to the EXTAL crystal frequency.
is equal to the EXTAL crystal frequency.
Time-out Period
Table
NOT USED
Table D-6 Software Watchdog Divide Ratio
Freescale Semiconductor, Inc.
D-6.
For More Information On This Product,
SWP
0
0
0
0
1
1
1
1
=
Go to: www.freescale.com
REGISTER SUMMARY
Divide Ratio Specified by SWP and SWT[1:0]
----------------------------------------------------------------------------------------------------------------------- -
SWT[1:0]
8
00
01
10
11
00
01
10
11
SWE
7
1
MODCLK
SWP
6
Divide Ratio
f
2
2
2
2
2
2
2
ref
2
11
13
15
18
20
22
24
9
5
0
SWT[1:0]
4
0
HME
3
0
M68HC16 Z SERIES
USER’S MANUAL
BME
2
0
$YFFA20
1
0
BMT[1:0]
0
0