MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 399

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MC68HC16Z1CFC16

Manufacturer Part Number
MC68HC16Z1CFC16
Description
IC MPU 1K RAM 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CFC16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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MRMCR — Masked ROM Module Configuration Register
D.4 Masked ROM Module
D.4.1 Masked ROM Module Configuration Register
STOP — Low-Power Stop Mode Enable
M68HC16 Z SERIES
USER’S MANUAL
DATA14
STOP
15
RESET:
The MRM is used only in the MC68HC16Z2 and the MC68HC16Z3.
the MRM address map.
The reset states shown for the MRM registers are for the generic (blank ROM) ver-
sions of the device. Several MRM register bit fields can be user-specified on a custom
masked ROM device. Contact a Freescale sales representative for information on or-
dering a custom ROM device.
The reset state of the STOP bit is the complement of DATA14 state during reset. The
ROM array base address cannot be changed unless the STOP bit is set.
This bit may be read or written at any time.
0 = ROM array operates normally.
1 = ROM array operates in low-power stop mode. The ROM array cannot be read
14
0
0
in this mode.
$YFF82C
$YFF83C
13
$YFF82A
$YFF82E
$YFF83A
$YFF83E
Address
$YFF820
$YFF822
$YFF824
$YFF826
$YFF828
$YFF830
$YFF832
$YFF834
$YFF836
$YFF838
0
0
BOOT
12
1
Freescale Semiconductor, Inc.
LOCK
15
11
0
For More Information On This Product,
Table D-21 MRM Address Map
EMUL
10
Masked ROM Module Configuration Register (MRMCR)
0
ROM Array Base Address Register High (ROMBAH)
ROM Array Base Address Register Low (ROMBAL)
Go to: www.freescale.com
REGISTER SUMMARY
9
1
ASPC[1:0]
ROM Bootstrap Word 0 (ROMBS0)
ROM Bootstrap Word 1 (ROMBS1)
ROM Bootstrap Word 2 (ROMBS2)
ROM Bootstrap Word 3 (ROMBS3)
Signature Register Low (SIGLO)
Signature Register High (SIGHI)
8
1
7
1
WAIT[1:0]
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
6
1
5
4
NOT USED
3
Table D-21
2
0
$YFF820
1
shows
D-25
0

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