MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 403

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

D.5 Analog-to-Digital Converter Module
M68HC16 Z SERIES
USER’S MANUAL
Address
$YFF70A
$YFF70C
$YFF70E
$YFF71A
$YFF71C
$YFF71E
$YFF72A
$YFF72C
$YFF72E
$YFF73A
$YFF73C
$YFF73E
NOTES:
$YFF700
$YFF702
$YFF704
$YFF706
$YFF708
$YFF710
$YFF712
$YFF714
$YFF716
$YFF718
$YFF720
$YFF722
$YFF724
$YFF726
$YFF728
$YFF730
$YFF732
$YFF734
$YFF736
$YFF738
1. Y = M111, where M is the logic state of the MM bit in the SIMCR
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Freescale Semiconductor, Inc.
Table D-24 ADC Module Address Map
For More Information On This Product,
Right-Justified Unsigned Result Register 0 (RJURR0)
Right-Justified Unsigned Result Register 1 (RJURR1)
Right-Justified Unsigned Result Register 2 (RJURR2)
Right-Justified Unsigned Result Register 3 (RJURR3)
Right-Justified Unsigned Result Register 4 (RJURR4)
Right-Justified Unsigned Result Register 5 (RJURR5)
Right-Justified Unsigned Result Register 6 (RJURR6)
Right-Justified Unsigned Result Register 7 (RJURR7)
Left-Justified Unsigned Result Register 0 (LJURR0)
Left-Justified Unsigned Result Register 1 (LJURR1)
Left-Justified Unsigned Result Register 2 (LJURR2)
Left-Justified Unsigned Result Register 3 (LJURR3)
Left-Justified Unsigned Result Register 4 (LJURR4)
Left-Justified Unsigned Result Register 5 (LJURR5)
Left-Justified Unsigned Result Register 6 (LJURR6)
Left-Justified Unsigned Result Register 7 (LJURR7)
Left-Justified Signed Result Register 0 (LJSRR0)
Left-Justified Signed Result Register 1 (LJSRR1)
Left-Justified Signed Result Register 2 (LJSRR2)
Left-Justified Signed Result Register 3 (LJSRR3)
Left-Justified Signed Result Register 4 (LJSRR4)
Left-Justified Signed Result Register 5 (LJSRR5)
Left-Justified Signed Result Register 6 (LJSRR6)
Left-Justified Signed Result Register 7 (LJSRR7)
Not Used
ADC Module Configuration Register (ADCMCR)
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REGISTER SUMMARY
ADC Test Register (ADCTEST)
Control Register 0 (ADCTL0)
Control Register 1 (ADCTL1)
Status Register (ADCSTAT)
Not Used
Not Used
8 7
Port ADA Data Register (PORTADA)
0
D-29