MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 414

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MC68HC16Z1CFC16

Manufacturer Part Number
MC68HC16Z1CFC16
Description
IC MPU 1K RAM 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CFC16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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ILQSPI[2:0] — Interrupt Level for QSPI
ILSCI[2:0] — Interrupt Level for SCI
INTV[7:0] — Interrupt Vector Number
D.6.4 SCI Control Register
SCCR0 — SCI Control Register 0
Bits [15:13] — Not Implemented
SCBR[12:0] — SCI Baud Rate
D-40
RESET:
15
When an interrupt request is made, the ILQSPI value determines the priority level of
all QSPI interrupts. When a request is acknowledged, the QSM compares this value
to a mask value supplied by the CPU16 to determine whether to respond. ILQSPI must
have a value in the range $0 (interrupts disabled) to $7 (highest priority).
When an interrupt request is made, the ILSCI value determines the priority level of all
SCI interrupts. When a request is acknowledged, the QSM compares this value to a
mask value supplied by the CPU16 to determine whether to respond. The field must
have a value in the range $0 (interrupts disabled) to $7 (highest priority).
If ILQSPI[2:0] and ILSCI[2:0] have the same non-zero value, and both submodules si-
multaneously request interrupt service, the QSPI takes priority over the SCI.
The value of INTV[7:1] is used for both QSPI and SCI interrupt requests; the value of
INTV0 used during an interrupt acknowledge cycle is supplied by the QSM. INTV0 is
at logic level zero during an SCI interrupt and at logic level one during a QSPI interrupt.
A write to INTV0 has no effect. Reads of INTV0 return a value of one. At reset, QIVR
is initialized to $0F, the uninitialized interrupt vector number. To use interrupt-driven
serial communication, a user-defined vector number must be written to QIVR.
SCCR0 contains the SCI baud rate selection field. Baud rate must be set before the
SCI is enabled. The CPU16 can read and write SCCR0 at any time. Changing the val-
ue of SCCR0 bits during a transfer operation disrupts operation.
SCI baud rate is programmed by writing a 13-bit value to this field. Writing a value of
zero to SCBR disables the baud rate generator. The baud clock rate is calculated as
follows:
where SCBR[12:0] is in the range of 1 to 8191.
NOT USED
14
13
12
0
Freescale Semiconductor, Inc.
11
For More Information On This Product,
0
SCBR[12:0]
SCI Baud Rate
10
0
Go to: www.freescale.com
REGISTER SUMMARY
9
0
=
-------------------------------------------------------------------------- -
32 SCI Baud Rate Desired
8
0
=
or
7
0
------------------------------------------- -
32 SCBR[12:0]
SCBR[12:0]
6
0
f
sys
f
sys
5
0
4
0
3
0
M68HC16 Z SERIES
USER’S MANUAL
2
1
$YFFC08
1
0
0
0

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