MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 494

• Manufacturer Part Number: MC68HC16Z1CFC16
• Description: IC MPU 1K RAM 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CFC16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Resistor-divider chain
Resolution
Result registers
Return-from-interrupt instruction (RTI)
R
RF energy
RIE D-42, D-61
RJURR
RLCK 6-2,
RMAC
ROM array space (ASPC)
ROMBAH/BAL 7-1,
ROMBS
ROMBS0-3 D-28
RR D-51
RS-232C terminal
RSIGHI/LO 7-1, 7-3,
RSR 5-24,
RT 9-28,
RTI
RWU 9-30, 10-22, D-42,
RXD (QSM)
RXDA/B (MCCI) 10-16,
S 4-4,
S8CM
Sample
SAR
Saturate mode (SM) bit 4-4,
SBK 9-27, 10-20, D-42,
SCAN
Scan mode selection (SCAN)
SCBR D-40,
SCCR
SCCR0
SCCR0A/B 10-13,
SCCR1
SCCR1A/B 10-16,
SCDR 9-24,
SCDRA/B 10-16,
SCF
SCI 9-1, 9-2, 9-16, 9-21,
I-12
F
8-22
4-40
processing summary 5-57
states of pins assigned to other MCU modules
status register (RSR) 5-24, 5-57
timing
capacitor
time
time selection (STS) field
baud
idle-line detection 9-29,
internal loop 9-30,
interrupt level (ILSCIA/B)
operation 9-25,
parity checking 9-26,
pins (MCCI)
D-36
8-13
D-3
D-32
D-32
9-24
4-9
D-36
D-40
D-41
7-1
clock 9-26,
rate 10-18, D-40,
10-21
8-7
5-55
8-14
D-23
D-8
8-7
9-25
D-44
D-59
8-5
8-13
10-16
D-63
C-2
D-59
D-60
D-27
10-17
10-18
D-27
8-5
10-22
10-17
D-62
D-62
10-1
–S–
10-19
D-26
D-59
D-3
10-21
D-32
D-55
D-31
Freescale Semiconductor, Inc.
For More Information On This Product,
4-40
Go to: www.freescale.com
5-54
SCIA/B
SCK 9-16,
SCSR 9-24,
SCSRA/B 10-16,
Select eight-conversion sequence mode (S8CM)
Send break (SBK) 9-27, 10-20, D-42,
Separate program and data space map
Sequence complete flag (SCF)
Serial
Set (definition)
Settling time
SFA 11-18,
SFB 11-18,
SHEN 5-47,
Show cycle
Signal characteristics
Signature registers (RSIGHI/LO)
pins (QSM)
receiver
registers
serial formats
transmitter
actual delay before SCK (equation)
baud rate (equation)
MC68HC16Z1/CKZ1/CMZ1
MC68HC16Z2/Z3
MC68HC16Z4/CKZ4
clock
communication interface (SCI) 9-1, 9-21, 10-1,
data word
formats 9-25,
interface clock signal (DSCLK)
mode (M) bit 9-25,
peripheral interface (SPI) 10-1,
shifter 9-24, 9-27,
enable (SHEN) 5-3, 5-47,
operation
timing diagram A-35
10-2
block diagram
operation 9-28,
wakeup 9-29,
control register 0 — MCCI (SCCR0A/B) 10-13,
control register 1 — MCCI (SCCR1A/B) 10-16,
control registers — QSM (SCCR)
data register
status register
block diagram
operation
baud rate (SPBR)
frequency range
9-20
D-75
D-75
D-43
D-6
8-22
MCCI
QSM
MCCI (SCDRA/B) 10-16,
QSM (SCDR)
MCCI (SCSRA/B) 10-16,
QSM (SCSR)
MCCI
QSM
9-24
5-47
4-44
2-6
9-25
D-62
D-59
D-60
10-18
10-18
9-27
9-23
9-22
10-15
10-14
3-13
3-24
10-19
10-22
10-18
10-20
9-17
3-25
4-44
D-48
9-24
9-24
D-6
D-36
3-23
7-1
M68HC16 Z SERIES
4-44
10-4
USER’S MANUAL
D-62
D-62
D-63
9-17
9-24
D-32
10-13