MC68HC16Z1CFC16 Freescale Semiconductor, MC68HC16Z1CFC16 Datasheet - Page 497

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MC68HC16Z1CFC16

Manufacturer Part Number
MC68HC16Z1CFC16
Description
IC MPU 1K RAM 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CFC16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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TSC 5-54,
TST
TSTMSRA/B
TSTRC
TSTSC
Two/three wire transfers
Two’s complement
TXD (QSM)
TXDA/B (MCCI) 10-16,
Typical ratings
UART 10-2,
Universal asynchronous receiver/transmitter (UART)
V 4-4,
V
VCO
V
V
V
Vector sources
V
V
V
Voltage
V
V
V
V
V
V
M68HC16 Z SERIES
USER’S MANUAL
CF
DD
DDA
DDSYN
I
IH
IL
PP
RH
RL
SRC
SSA
STBY
8-22
8-2
8-2
data
enable (TE)
interrupt enable (TIE)
RAM
2.7V to 3.6V, 16.78 MHz
20.97 MHz
25.17 MHz
5V, 16.78 MHz
8-22
ramp time
controlled oscillator (VCO)
limiting diodes
C-2
5-53, 8-1, 8-3, 8-14,
5-55,
5-53, 8-1, 8-3, 8-14,
D-8
5-6
8-1, 8-3,
8-1, 8-3,
8-22
D-3
6-2
D-22
D-22
5-6,
(TXD) pin — QSM
(TXDA/B) pins — MCCI
register empty (TDRE) flag
MCCI 10-4, 10-13, 10-19,
QSM 9-27,
MCCI 10-20,
QSM 9-28,
10-2,
frequency (f
frequency ramp time
9-7
6-1
5-56
9-25
10-13
5-55
MCCI 10-19,
QSM 9-27,
D-22
10-13
8-14
8-14
5-56
D-56
A-3
A-4
4-6
8-19
A-3
D-42
D-42
VCO
D-61
10-17
10-4
)
8-23
D-43
8-23
–U–
–V–
5-6
D-62
9-25
A-2
5-56
Freescale Semiconductor, Inc.
5-6
10-17
For More Information On This Product,
D-62
Go to: www.freescale.com
W
WAIT 7-3,
Wait states field (WAIT)
WAKE 9-30, 10-22, D-42,
Wakeup
WCOL
Wired-OR
WOMC
WOMP
WOMQ
WOMS 9-27, 10-19, D-41,
Word composition
Wrap
Wraparound mode
WREN D-50
Write
WRTO D-50
X
XK 4-3,
XTAL
XTRST (external reset)
Y
YK 4-3,
Z
Zero flag (Z)
ZK 4-3,
4-4
D-8
D-8
D-8
address mark (WAKE) 9-30, 10-22, D-42,
functions
mode
open-drain outputs
enable (WREN) D-50
to (WRTO) D-50
master
slave
collision (WCOL) 10-12,
cycle
bit in SYNCR
5-5
D-65
10-11
10-16
D-47
4-5
4-5
4-5
for QSPI pins (WOMQ)
for SCI pins (WOMS)
flowchart
timing diagram
5-38
9-21
D-26
9-19
4-4
MCCI 10-19,
QSM 9-27,
9-2
5-6
4-7
5-39
9-6
5-48
10-11
D-26
A-30
–W–
D-41
–X–
–Y–
–Z–
D-61
D-61
D-61
D-65
D-47
D-61
I-15

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