MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 121

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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5.6 Interrupts
M68HC11E Family — Rev. 3.2
MOTOROLA
The MCU has 18 interrupt vectors that support 22 interrupt sources. The
15 maskable interrupts are generated by on-chip peripheral systems.
These interrupts are recognized when the global interrupt mask bit (I) in
the condition code register (CCR) is clear. The three non-maskable
interrupt sources are illegal opcode trap, software interrupt, and XIRQ
pin. Refer to
assignments for each source.
FFC0, C1 – FFD4, D5 Reserved
Vector Address
FFDA, DB
FFDC, DD
FFEC, ED
FFDE, DF
FFEA, EB
FFFC, FD
FFD6, D7
FFD8, D9
FFEE, EF
FFE0, E1
FFE2, E3
FFE4, E5
FFE6, E7
FFE8, E9
FFFA, FB
FFFE, FF
FFF0, F1
FFF2, F3
FFF4, F5
FFF6, F7
FFF8, F9
Table 5-4. Interrupt and Reset Vector Assignments
Table
Resets and Interrupts
Pulse accumulator input edge
Pulse accumulator overflow
Timer overflow
SCI serial system
SPI serial transfer complete
Timer input capture 4/output compare 5
Timer output compare 4
Timer output compare 3
Timer output compare 2
Timer output compare 1
Timer input capture 3
Timer input capture 2
Timer input capture 1
Real-time interrupt
IRQ (external pin)
XIRQ pin
Software interrupt
Illegal opcode trap
COP failure
Clock monitor fail
RESET
5-4, which shows the interrupt sources and vector
• SCI receive data register full
• SCI receiver overrun
• SCI transmit data register empty
• SCI transmit complete
• SCI idle line detect
Interrupt Source
Resets and Interrupts
Mask Bit
None
None
None
None
None
CCR
X
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Technical Data
Interrupts
NOCOP
PAOVI
Local
I4/O5I
Mask
TCIE
SPIE
OC4I
OC3I
OC2I
OC1I
None
None
None
None
None
CME
IC3I
IC2I
IC1I
RTII
ILIE
PAII
RIE
RIE
TOI
TIE
121

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