MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 139

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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6.7 Port E
6.8 Handshake Protocol
M68HC11E Family — Rev. 3.2
MOTOROLA
Alternate Function:
Address:
Port E is used for general-purpose static inputs or pins that share
functions with the analog-to-digital (A/D) converter system. When some
port E pins are being used for general-purpose input and others are
being used as A/D inputs, PORTE should not be read during the sample
portion of an A/D conversion.
Simple and full handshake input and output functions are available on
ports B and C pins in single-chip mode. In simple strobed mode, port B
is a strobed output port and port C is a latching input port. The two
activities are available simultaneously.
The STRB output is pulsed for two E-clock periods each time there is a
write to the PORTB register. The INVB bit in the PIOC register controls
the polarity of STRB pulses. Port C levels are latched into the alternate
port C latch (PORTCL) register on each assertion of the STRA input.
STRA edge select, flag, and interrupt enable bits are located in the PIOC
register. Any or all of the port C lines can still be used as
general-purpose I/O while in strobed input mode.
Reset:
Read:
Write:
$100A
Bit 7
AN7
PE7
Figure 6-9. Port E Data Register (PORTE)
Parallel Input/Output (I/O) Ports
PE6
AN6
6
PE5
AN5
5
Indeterminate after reset
PE4
AN4
4
AN3
PE3
3
Parallel Input/Output (I/O) Ports
AN2
PE2
2
PE1
AN1
1
Technical Data
Bit 0
PE0
AN0
Port E
139

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