MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 157

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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7.8.5 Baud Rate Register
M68HC11E Family — Rev. 3.2
MOTOROLA
NOTE:
Address:
FE — Framing Error Flag
Bit 0 — Unimplemented
Use this register to select different baud rates for the SCI system. The
SCP[1:0] (SCP[2:0] in MC68HC(7)11E20) bits function as a prescaler for
the SCR[2:0] bits. Together, these five bits provide multiple baud rate
combinations for a given crystal frequency. Normally, this register is
written once during initialization. The prescaler is set to its fastest rate by
default out of reset and can be changed at any time. Refer to
for normal baud rate selections.
TCLR — Clear Baud Rate Counter Bit (Test)
SCP[2:0] — SCI Baud Rate Prescaler Select Bits
SCP2 applies to MC68HC(7)11E20 only. When SCP2 = 1, SCP[1:0]
must equal 0s. Any other values for SCP[1:0] are not decoded in the
prescaler and the results are unpredictable. Refer to
Figure
Reset:
Read:
Write:
FE is set when a 0 is detected where a stop bit was expected. Clear
the FE flag by reading SCSR with FE set and then reading SCDR.
Always reads 0
0 = Stop bit detected
1 = Zero detected
U = Unaffected
7-9.
Serial Communications Interface (SCI)
$102B
TCLR
Bit 7
0
Figure 7-7. Baud Rate Register (BAUD)
SCP2
6
0
SCP1
5
0
SCP0
4
0
Serial Communications Interface (SCI)
RCKB
3
0
SCR2
U
2
Figure 7-8
SCR1
U
1
Technical Data
SCI Registers
Table 7-1
and
SCR0
Bit 0
U
157

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