MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 168

• Manufacturer Part Number: MC68HC711E20CFN2
• Description: IC MCU 20K 2MHZ OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E20CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 20KB (20K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Serial Peripheral Interface (SPI)
8.4 SPI Transfer Formats
Technical Data
168
(CPHA = 0)
(CPHA = 1)
1. SS ASSERTED
2. MASTER WRITES TO SPDR
3. FIRST SCK EDGE
4. SPIF SET
5. SS NEGATED
SAMPLE INPUT
SAMPLE INPUT
SCK (CPOL = 0)
SCK (CPOL = 1)
SS (TO SLAVE)
SCK CYCLE #
DATA OUT
DATA OUT
1
During an SPI transfer, data is simultaneously transmitted and received.
A serial clock line synchronizes shifting and sampling of the information
on the two serial data lines. A slave select line allows individual selection
of a slave SPI device; slave devices that are not selected do not interfere
with SPI bus activities. On a master SPI device, the select line can
optionally be used to indicate a multiple master bus contention. Refer to
Figure
2
MSB
3
MSB
1
Figure 8-2. SPI Transfer Format
8-2.
6
Serial Peripheral Interface (SPI)
2
6
SLAVE CPHA = 1 TRANSFER IN PROGRESS
SLAVE CPHA = 0 TRANSFER IN PROGRESS
5
MASTER TRANSFER IN PROGRESS
3
5
4
4
4
3
5
3
2
6
2
1
M68HC11E Family — Rev. 3.2
7
1
LSB
8
LSB
4
MOTOROLA
5