MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 281

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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AN1060 — Rev. 1.0
MOTOROLA
pins during reset, the selected mode, and the state of the MDA, SMOD,
and RBOOT control bits. Refer to the composite memory map and
information in
The MDA control bit is determined by the state of the MODA pin as the
MCU leaves reset. MDA selects between single-chip and expanded
operating modes. When MDA is 0, a single-chip mode is selected, either
normal single-chip mode or special bootstrap mode. When MDA is 1, an
expanded mode is selected, either normal expanded mode or special
test mode.
The SMOD control bit is determined by the inverted state of the MODB
pin as the MCU leaves reset. SMOD controls whether a normal mode or
a special mode is selected. When SMOD is 0, one of the two normal
modes is selected, either normal single-chip mode or normal expanded
mode. When SMOD is 1, one of the two special modes is selected, either
special bootstrap mode or special test mode. When either special mode
is in effect (SMOD = 1), certain privileges are in effect, for instance, the
ability to write to the mode control bits and fetching the reset and
interrupt vectors from $BFxx rather than $FFxx.
The alternate vector locations are achieved by simply driving address bit
A14 low during all vector fetches if SMOD = 1. For special test mode, the
alternate vector locations assure that the reset vector can be fetched
from external memory space so the test system can control MCU
operation. In special bootstrap mode, the small boot ROM is enabled in
the memory map by RBOOT = 1 so the reset vector will be fetched from
this ROM and the bootloader firmware will control MCU operation.
MODB
1
0
0
0
Input Pins
MODA
Table 1
0
0
0
1
Table 1. Mode Selection Summary
for the following discussion.
Normal single chip
Normal expanded
Special bootstrap
Mode Selected
Special test
RBOOT
Control Bits in HPRIO
0
0
1
0
SMOD
Application Note
0
0
1
1
MDA
0
1
0
1
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