MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 56

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Central Processor Unit (CPU)
3.6.6 Relative
3.7 Instruction Set
Technical Data
56
The relative addressing mode is used only for branch instructions. If the
branch condition is true, an 8-bit signed offset included in the instruction
is added to the contents of the program counter to form the effective
branch address. Otherwise, control proceeds to the next instruction.
These are usually 2-byte instructions.
Refer to
possible addressing modes. For each instruction, the table shows the
operand construction, the number of machine code bytes, and execution
time in CPU E-clock cycles.
Table
Central Processor Unit (CPU)
3-2, which shows all the M68HC11 instructions in all
M68HC11E Family — Rev. 3.2
MOTOROLA

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