MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 91

• Manufacturer Part Number: MC68HC711E20CFN2
• Description: IC MCU 20K 2MHZ OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E20CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 20KB (20K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.4.3.3 System Configuration Options Register
M68HC11E Family — Rev. 3.2
MOTOROLA
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during
The 8-bit, special-purpose system configuration options register
(OPTION) sets internal system configuration options during initialization.
The time protected control bits, IRQE, DLY, and CR[1:0], can be written
only once after a reset and then they become read-only. This minimizes
the possibility of any accidental changes to the system configuration.
ADPU — Analog-to-Digital Converter Power-Up Bit
CSEL — Clock Select Bit
IRQE — Configure IRQ for Edge-Sensitive Only Operation Bit
DLY — Enable Oscillator Startup Delay Bit
Address:
special modes.
Figure 4-13. System Configuration Options Register (OPTION)
Reset:
Read:
Write:
Refer to
Selects alternate clock source for on-chip EEPROM charge pump.
Refer to
for more information on EEPROM use.
CSEL also selects the clock source for the A/D converter, a function
discussed in
Refer to
0 = The oscillator startup delay coming out of stop mode is
1 = A delay of approximately 4000 E-clock cycles is imposed as the
Operating Modes and On-Chip Memory
$1039
ADPU
bypassed and the MCU resumes processing within about four
bus cycles.
MCU is started up from the stop power-saving mode. This
delay allows the crystal oscillator to stabilize.
Bit 7
0
Section 10. Analog-to-Digital (A/D)
4.6.1 EEPROM and CONFIG Programming and Erasure
Section 5. Resets and
Section 10. Analog-to-Digital (A/D)
= Unimplemented
CSEL
6
0
IRQE
5
0
(1)
DLY
4
1
Interrupts.
(1)
Operating Modes and On-Chip Memory
CME
3
0
Converter.
2
0
Converter.
CR1
Technical Data
1
0
Memory Map
(1)
CR0
Bit 0
0
(1)
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