MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 103
Manufacturer Part Number
IC MCU 20K 2MHZ OTP 52-PLCC
Specifications of MC68HC711E20CFN2
Number Of I /o
Program Memory Size
20KB (20K x 8)
Program Memory Type
512 x 8
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
CWOM — Port C Wired-OR Mode Bit (affects all eight port C pins)
HNDS — Handshake Mode Bit
OIN — Output or Input Handshake Select Bit
PLS — Pulsed/Interlocked Handshake Operation Bit
EGA — Active Edge for Strobe A Bit
INVB — Invert Strobe B Bit
It is customary to have an external pullup resistor on lines that are driven by open-drain devices.
HNDS must be set to 1 for this bit to have meaning.
HNDS must be set to 1 for this bit to have meaning. When interlocked handshake is selected, strobe
B is active until the selected edge of strobe A is detected.
0 = Port C outputs are normal CMOS outputs.
1 = Port C outputs are open-drain outputs.
0 = Simple strobe mode
1 = Full input or output handshake mode
0 = Input handshake
1 = Output handshake
0 = Interlocked handshake
1 = Pulsed handshake (Strobe B pulses high for two E-clock cycles.)
0 = STRA falling edge selected, high level activates port C outputs (output handshake)
1 = STRA rising edge selected, low level activates port C outputs (output handshake)
0 = Active level is logic 0.
1 = Active level is logic 1.
M68HC11E Family Data Sheet, Rev. 5.1
Parallel I/O Control Register