MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 197

no-image

MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711E20CFN2
Manufacturer:
VISHAY
Quantity:
10 000
Part Number:
MC68HC711E20CFN2
Manufacturer:
FREESCAL
Quantity:
276
Part Number:
MC68HC711E20CFN2
Manufacturer:
MOT
Quantity:
5 510
Part Number:
MC68HC711E20CFN2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 2
a 2-MHz E-clock rate) and the alternate baud rate (1200 baud at a 2-MHz E-clock rate). The host
computer sends an initial $FF character, which is used by the bootloader to determine the baud rate that
will be used for the downloading operation. The top half of
Receive data samples at [1] detect the falling edge of the start bit and then verify the start bit by taking a
sample at the center of the start bit time. Samples are then taken at the middle of each bit time [2] to
reconstruct the value of the received character (all 1s in this case). A sample is then taken at the middle
of the stop bit time as a framing check (a 1 is expected) [3]. Unless another character immediately follows
this $FF character, the receive data line will idle in the high state as shown at [4].
The bottom half of
from the host at 1200 baud. Because the receiver is set to 7812 baud, the receive data samples are taken
at the same times as in the upper half of
the start bit at 7812 baud [6].
Freescale Semiconductor
NOTE: Software can change some aspects of the memory map after reset.
$BFC0
$01FF
$BFFF
$FFC0
$0000
$B7FF
$FFFF
$103F
$B600
$BF00
$D000
$1000
shows how the bootloader program differentiates between the default baud rate (7812 baud at
MODA = 0
MODB = 1
SINGLE
CHIP
Figure 2
Figure 1. MC68HC711E9 Composite Memory Map
MULTIPLEXED
EXTERNAL
EXTERNAL
EXTERNAL
EXPANDED
MODA = 1
MODB = 1
shows how the receiver will incorrectly receive the $FF character that is sent
M68HC11 Bootstrap Mode, Rev. 1.1
BOOTSTRAP
MODA = 0
MODB = 0
SPECIAL
Figure
2. The start bit at 1200 baud [5] is 6.5 times as long as
EXTERNAL
EXTERNAL
EXTERNAL
MODA = 1
MODB = 0
SPECIAL
TEST
Figure 2
shows normal reception of $FF.
Automatic Selection of Baud Rate
REGISTER
12K USER
512-BYTE
512-BYTE
EEPROM
64-BYTE
(or OTP)
EPROM
BLOCK
BOOT
ROM
RAM
(MAY BE REMAPPED
TO ANY 4K BOUNDARY)
(MAY BE REMAPPED
TO ANY 4K BOUNDARY)
(MAY BE DISABLED
BY AN EEPROM BIT)
(MAY BE DISABLED
BY AN EEPROM BIT)
VECTORS
VECTORS
SPECIAL
NORMAL
$BFC0
MODE
$FFC0
MODE
$BFFF
$FFFF
197

Related parts for MC68HC711E20CFN2