MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 39

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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2.3.1 RAM and Input/Output Mapping
Hardware priority is built into RAM and I/O mapping. Registers have priority over RAM and RAM has
priority over ROM. When a lower priority resource is mapped at the same location as a higher priority
resource, a read/write of a location results in a read/write of the higher priority resource only. For example,
if both the register block and the RAM are mapped to the same location, only the register block will be
accessed. If RAM and ROM are located at the same position, RAM has priority.
The fully static RAM can be used to store instructions, variables, and temporary data. The direct
addressing mode can access RAM locations using a 1-byte address operand, saving program memory
space and execution time, depending on the application.
RAM contents can be preserved during periods of processor inactivity by two methods, both of which
reduce power consumption. They are:
Freescale Semiconductor
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during special modes.
2. MC68HC711E9 only
3. MC68HC811E2 only
$103E
Addr.
$103F
$103F
1. In the software-based stop mode, the clocks are stopped while V
2. In the second method, the MODB/V
power supply current is directly related to operating frequency in CMOS integrated circuits, only a
very small amount of leakage exists when the clocks are stopped.
a second power supply.
device. Adjustments to the circuit must be made for devices that operate at lower voltages. Using
the MODB/V
of external circuitry is operating from V
be held low whenever V
Interrupts.
System Configuration Register
System Configuration Register
Register Name
Figure 2-7. Register and Control Bit Assignments (Sheet 6 of 6)
STBY
See page 43.
See page 43.
(CONFIG)
(CONFIG)
Reserved
pin may require external hardware, but can be justified when a significant amount
(3)
DD
Figure 2-8
Reset:
Reset:
Read:
Write:
Read:
Write:
is below normal operating level. Refer to
M68HC11E Family Data Sheet, Rev. 5.1
I = Indeterminate after reset
Bit 7
EE3
R
0
1
STBY
shows a typical standby voltage circuit for a standard 5-volt
= Unimplemented
DD
EE2
pin can supply RAM power from a battery backup or from
R
6
0
1
. If V
STBY
EE1
R
5
0
1
is used to maintain RAM contents, reset must
EE0
R
R
4
0
1
= Reserved
DD
NOSEC
NOSEC
R
U
U
3
powers the MCU. Because
Chapter 5 Resets and
NOCOP
NOCOP
U = Unaffected
R
U
U
2
ROMON
R
1
1
1
Memory Map
EEON
EEON
Bit 0
R
U
1
39

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