MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 43

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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2.3.3.1 System Configuration Register
The system configuration register (CONFIG) consists of an EEPROM byte and static latches that control
the startup configuration of the MCU. The contents of the EEPROM byte are transferred into static
working latches during reset sequences. The operation of the MCU is controlled directly by these latches
and not by CONFIG itself. In normal modes, changes to CONFIG do not affect operation of the MCU until
after the next reset sequence. When programming, the CONFIG register itself is accessed. When the
CONFIG register is read, the static latches are accessed. See
Programming and Erasure
To take full advantage of the MCU’s functionality, customers can program the CONFIG register in
bootstrap mode. This can be accomplished by setting the mode pins to logic 0 and downloading a small
program to internal RAM. For more information, Freescale application note AN1060 entitled
Bootstrap Mode
All of this functionality is provided by PCbug11 which can be found on the Freescale Web site at
http://www.freescale.com. For more information on using PCbug11 to program an E-series device,
Freescale engineering bulletin EB296 entitled
the M68HC11EVBU
Operation of the CONFIG register in the MC68HC811E2 differs from other devices in the M68HC11 E
series. See
Freescale Semiconductor
Bulk erase
Byte programming
Communication server
Resets:
U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch prior to reset,
but the function of COP is controlled by the DISR bit in TEST1 register.
Figure 2-10
Single chip:
Expanded:
Bootstrap:
Address: $103F
The CONFIG register on the 68HC11 is an EEPROM cell and must be
programmed accordingly.
has been included at the back of this document. The downloadable talker will consist of:
Read:
Write:
Test:
has been included at the back of this document.
Figure 2-10. System Configuration Register (CONFIG)
and
Bit 7
0
0
0
0
for information on modifying CONFIG.
Figure
= Unimplemented
6
0
0
0
0
M68HC11E Family Data Sheet, Rev. 5.1
2-11.
5
0
0
0
0
Programming MC68HC711E9 Devices with PCbug11 and
NOTE
4
0
0
0
0
NOSEC
U
U
3
1
1
2.5.1 EEPROM and CONFIG
NOCOP
U(L)
U(L)
U
U
2
ROMON
U
U
U
1
1
EEON
Bit 0
U
U
U
U
M68HC11
Memory Map
43

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