MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 79

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MC68HC711E20CFN2

Manufacturer Part Number
MC68HC711E20CFN2
Description
IC MCU 20K 2MHZ OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E20CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Chapter 5
Resets and Interrupts
5.1 Introduction
Resets and interrupt operations load the program counter with a vector that points to a new location from
which instructions are to be fetched. A reset immediately stops execution of the current instruction and
forces the program counter to a known starting address. Internal registers and control bits are initialized
so the MCU can resume executing instructions. An interrupt temporarily suspends normal program
execution while an interrupt service routine is being executed. After an interrupt has been serviced, the
main program resumes as if there had been no interruption.
5.2 Resets
The four possible sources of reset are:
POR and RESET share the normal reset vector. COP reset and the clock monitor reset each has its own
vector.
5.2.1 Power-On Reset (POR)
A positive transition on V
conditions. POR cannot be used to detect drops in power supply voltages. A 4064 t
cycle) delay after the oscillator becomes active allows the clock generator to stabilize. If RESET is at
logical 0 at the end of 4064 t
The POR circuit only initializes internal circuitry during cold starts. Refer to
Figure 1-7. External Reset
Freescale Semiconductor
Power-on reset (POR)
External reset (RESET)
Computer operating properly (COP) reset
Clock monitor reset
It is important to protect the MCU during power transitions. Most M68HC11
systems need an external circuit that holds the RESET pin low whenever
V
detector, or other external reset circuits, are the usual source of reset in a
system.
DD
is below the minimum operating level. This external voltage level
DD
Circuit.
generates a power-on reset (POR), which is used only for power-up
CYC
, the CPU remains in the reset condition until RESET goes to logical 1.
M68HC11E Family Data Sheet, Rev. 5.1
NOTE
CYC
(internal clock
79

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