MC68HC11K1CFN4 Freescale Semiconductor, MC68HC11K1CFN4 Datasheet - Page 232

• Manufacturer Part Number: MC68HC11K1CFN4
• Description: IC MCU 640 EEPROM 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11K1CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

Memory Expansion and Chip Selects
11.3 Memory Expansion
11.3.1 Memory Size and Address Line Allocation
Technical Data
232
The M68HC11K Family devices employ a register-based paging
scheme to extend their address range beyond the physical 64-Kbyte
limit of the 16 CPU address lines. Pages are selected using the
expansion address lines XA[18:13] available on port G. This selection
can be facilitated by the chip-select lines on port H, discussed in
11.4 Chip
features since they lack the required port G and port H lines. Refer to
Figure 1-2. M68HC11KS Family Block
To access expanded memory, the user first allocates portion(s) of the 64
Kbyte address space, or window(s), through which the CPU will view
external memory. One or two windows can be designated, and the size
of each window can be 0 (disabled), 8, 16, or 32 Kbytes.
Expanded memory is addressed with a combination of the CPU’s normal
address lines ADDR[15:0] and the expansion address lines XA[18:13].
The expansion address lines select a memory bank, and the CPU’s
normal address lines select a particular location within the bank. The
size of the window(s) and the number of memory banks determine
exactly which expansion address lines are used. The port G assignment
register (PGAR) controls which port G pins function as expanded
address lines. Any port G pins not allocated for memory expansion can
serve as general-purpose input/output (GPIO). When a configuration
uses any of the lower three expansion address lines XA[15:13] they
replace the CPU's equivalent address lines (ADDR[15:13]).
shows how address and expansion lines are allocated for various
combinations of memory banks and window size.
Freescale Semiconductor, Inc.
For More Information On This Product,
Memory Expansion and Chip Selects
Selects. The M68HC11KS devices do not provide these
Go to: www.freescale.com
Diagram.
M68HC11K Family
Table 11-1
MOTOROLA