MC68HC11K1CFN4 Freescale Semiconductor, MC68HC11K1CFN4 Datasheet - Page 69

• Manufacturer Part Number: MC68HC11K1CFN4
• Description: IC MCU 640 EEPROM 4MHZ 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11K1CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

M68HC11K Family
MOTOROLA
1. Present only in EPROM (711) devices
2. Not available on M68HC11K4 devices
$002C
$002D
$002A
$002B
$002E
$002F
$0028
$0029
$0030
$0031
Addr.
Serial Peripheral Status
Port Pullup Assignment
Control/Status Register
EPROM Programming
Serial Peripheral Data
System Configuration
Port G Assignment
Options 3 Register
Results Register 1
Register (SPDR)
Register (PGAR)
Serial Peripheral
Register (SPSR)
Analog-to-Digital
Analog-to-Digital
Register (PPAR)
Control Register
Control Register
Register Name
See page 174.
See page 176.
See page 177.
See page 147.
See page 235.
See page 132.
See page 227.
See page 229.
Figure 4-1. Register and Control Bit Assignments (Sheet 5 of 11)
See page 91.
(EPROG)
Reserved
(OPT3)
(ADCTL)
(SPCR)
(ADR1)
(1)
(2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Operating Modes and On-Chip Memory
Bit 7
SPIE
SPIF
Bit 7
CCF
Bit 7
R
R
0
0
0
0
0
0
0
0
0
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= Unimplemented
WCOL
Bit 6
Bit 6
SPE
SM
R
6
0
0
0
0
0
0
0
0
0
0
0
PGAR5
DWOM
SCAN
ELAT
Bit 5
Bit 5
R
U
5
0
0
0
0
0
0
0
0
Undefined after reset
Undefined after reset
EXCOL
PGAR4
MODF
MSTR
MULT
Bit 4
Bit 4
4
0
0
0
0
0
0
0
R
U
R
Operating Modes and On-Chip Memory
= Reserved
EXROW
HPPUE
PGAR3
CPOL
Bit 3
Bit 3
CD
R
U
3
0
0
0
0
1
0
0
GPPUE
PGAR2
CPHA
Bit 2
Bit 2
CC
R
U
2
1
0
0
0
0
1
0
0
U = Undefined
FPPUE
PGAR1
Control Registers
SPR1
Bit 1
Bit 1
CB
U
R
U
1
0
0
0
0
1
0
0
Technical Data
BPPUE
PGAR0
EPGM
SPR0
Bit 0
Bit 0
Bit 0
CA
U
R
U
0
0
0
1
0
0
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