MC68HC908QY2CDW Freescale Semiconductor, MC68HC908QY2CDW Datasheet - Page 96

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MC68HC908QY2CDW

Manufacturer Part Number
MC68HC908QY2CDW
Description
IC MCU 1.5K FLASH W/ADC 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QY2CDW

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Connectivity
-
Oscillator Module (OSC)
11.8.1 Oscillator Status Register
The oscillator status register (OSCSTAT) contains the bits for switching from internal to external clock
sources.
ECGON — External Clock Generator On Bit
ECGST — External Clock Status Bit
11.8.2 Oscillator Trim Register (OSCTRIM)
TRIM7–TRIM0 — Internal Oscillator Trim Factor Bits
96
This read/write bit enables external clock generator, so that the switching process can be initiated. This
bit is forced low during reset. This bit is ignored in monitor mode with the internal oscillator bypassed,
PTM or CTM mode.
This read-only bit indicates whether or not an external clock source is engaged to drive the system
clock.
These read/write bits change the size of the internal capacitor used by the internal oscillator. By
measuring the period of the internal clock and adjusting this factor accordingly, the frequency of the
internal clock can be fine tuned. Increasing (decreasing) this factor by one increases (decreases) the
period by approximately 0.2% of the untrimmed period (the period for TRIM = $80). The trimmed
frequency is guaranteed not to vary by more than ±5% over the full specified range of temperature and
voltage. The reset value is $80, which sets the frequency to 12.8 MHz (3.2 MHz bus speed) ±25%.
Applications using the internal oscillator should copy the internal oscillator trim value at location $FFC0
or $FFC1 into this register to trim the clock source.
1 = External clock generator enabled
0 = External clock generator disabled
1 = An external clock source engaged
0 = An external clock source disengaged
Address: $0036
Address: $0038
Reset:
Reset:
Read:
Read:
Write:
Write:
TRIM7
Bit 7
Bit 7
R
R
0
1
Figure 11-4. Oscillator Status Register (OSCSTAT)
Figure 11-5. Oscillator Trim Register (OSCTRIM)
= Reserved
TRIM6
MC68HC908QY/QT Family Data Sheet, Rev. 6
R
0
6
0
6
TRIM5
R
5
0
5
0
TRIM4
R
4
0
4
0
= Unimplemented
TRIM3
R
3
0
3
0
TRIM2
R
2
0
2
0
ECGON
TRIM1
1
0
1
0
Freescale Semiconductor
ECGST
TRIM0
Bit 0
Bit 0
0
0

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