MC68HC908QY4CDW Freescale Semiconductor, MC68HC908QY4CDW Datasheet - Page 85

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MC68HC908QY4CDW

Manufacturer Part Number
MC68HC908QY4CDW
Description
IC MCU 4K FLASH W/ADC 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QY4CDW

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Connectivity
-

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Chapter 10
Low-Voltage Inhibit (LVI)
10.1 Introduction
This section describes the low-voltage inhibit (LVI) module, which monitors the voltage on the V
and can force a reset when the V
10.2 Features
Features of the LVI module include:
10.3 Functional Description
Figure 10-1
user selectable options found in the configuration register (CONFIG1). See
Register
The LVI is enabled out of reset. The LVI module contains a bandgap reference circuit and comparator.
Clearing the LVI power disable bit, LVIPWRD, enables the LVI to monitor V
reset disable bit, LVIRSTD, enables the LVI module to generate a reset when V
Freescale Semiconductor
Programmable LVI reset
Programmable power consumption
Selectable LVI trip voltage
Programmable stop mode operation
(CONFIG).
shows the structure of the LVI module. LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are
FROM CONFIG
DETECTOR
LVI5OR3
LOW V
V
DD
DD
Figure 10-1. LVI Module Block Diagram
V
V
MC68HC908QY/QT Family Data Sheet, Rev. 6
DD
DD
DD
FROM CONFIG
> LVITRIP = 0
≤ LVITRIP = 1
voltage falls below the LVI trip falling voltage, V
LVIPWRD
LVIOUT
STOP INSTRUCTION
FROM CONFIG
LVIRSTD
FROM CONFIG
DD
Chapter 5 Configuration
LVI RESET
LVISTOP
voltage. Clearing the LVI
DD
falls below a voltage,
TRIPF
.
DD
pin
85

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