MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 1002

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

READI Module
24.7.6
The READI reset configuration information is received via EVTI and MDI0 to enable or disable the
READI module and select the port size. EVTI and MDI0 are sampled synchronously at the negation of
RSTI. Reset configuration information must be valid on EVTI and MDI0 at least four clocks prior to the
negation of RSTI.
If EVTI is sampled asserted at negation of RSTI, the READI module will be enabled. This is illustrated in
Figure
READI control and status information will be reset and the auxiliary output port will be three-stated, when
RSTI is asserted. System reset will not reset the READI control and status information and not three-state
the auxiliary output port.
Port size configuration is selected via the value of MDI0 at the negation of RSTI.
the READI reset configuration options.
RSTI has a pull-down resistor in the pads. If the auxiliary port is not connected to a tool, READI module
will be in reset state and not drive the auxiliary output port.
24-34
System
Clock
RSTI
EVTI
24-15.
READI Reset Configuration
Reset configuration information must be valid on EVTI
at least 4 system clocks prior to RSTI negation.
EVTI
1
0
0
Table 24-25. READI Reset Configuration Options
MDI [0]
MPC561/MPC563 Reference Manual, Rev. 1.2
X
1
0
Figure 24-15. READI Module Enabled
Module Enabled, Default Full Port Configuration
Module Enabled, Reduced Port Configuration
Module Disabled. All outputs three-stated.
EVTI is sampled at the negation of RSTI. Because EVTI is
asserted, the READI module is enabled.
Configuration
2 MDI, 8 MDO
1 MDI, 2 MDO
Table 24-25
Freescale Semiconductor
describes